MK30DN512ZVLQ10 Freescale Semiconductor, MK30DN512ZVLQ10 Datasheet

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MK30DN512ZVLQ10

Manufacturer Part Number
MK30DN512ZVLQ10
Description
Specifications: Program Memory Size: 512KB (512K x 8) ; RAM Size: 128K x 8 ; Number of I /O: 102 ; Package / Case: 144-LQFP ; Speed: 100MHz ; Oscillator Type: Internal ; Packaging: Tray ; Program Memory Type: FLASH ; EEPROM Size: - ; Core Processor:
Manufacturer
Freescale Semiconductor
Datasheets

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Freescale Semiconductor
Data Sheet: Technical Data
K30 Sub-Family Data Sheet
Supports the following:
MK30DX128ZVLQ10,
MK30DX128ZVMD10,
MK30DX256ZVLQ10,
MK30DX256ZVMD10,
MK30DN512ZVLQ10,
MK30DN512ZVMD10
Features
• Operating Characteristics
• Performance
• Memories and memory interfaces
• Clocks
• System peripherals
Freescale reserves the right to change the detail specifications as may be
required to permit improvements in the design of its products.
© 2010–2011 Freescale Semiconductor, Inc.
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
– Up to 100 MHz ARM Cortex-M4 core with DSP
– Up to 512 KB program flash memory on non-
– Up to 128 KB RAM
– Serial programming interface (EzPort)
– FlexBus external bus interface
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
– 10 low-power modes to provide power optimization
– Memory protection unit with multi-master
– 16-channel DMA controller, supporting up to 64
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
instructions delivering 1.25 Dhrystone MIPS per
MHz
FlexMemory devices
based on application requirements
protection
request sources
• Security and integrity modules
• Human-machine interface
• Analog modules
• Timers
– Hardware CRC module to support fast cyclic
– 128-bit unique identification (ID) number per chip
– Segment LCD controller supporting up to 40
– Low-power hardware touch sensor interface (TSI)
– General-purpose input/output
– Two 16-bit SAR ADCs
– Programmable gain amplifier (PGA) (up to x64)
– Two 12-bit DACs
– Three analog comparators (CMP) containing a 6-bit
– Voltage reference
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
– Two 2-channel quadrature decoder/general purpose
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
redundancy checks
frontplanes and 8 backplanes, or 44 frontplanes and
4 backplanes
integrated into each ADC
DAC and programmable reference input
timer
timers
K30P144M100SF2
Document Number: K30P144M100SF2
Rev. 6, 9/2011

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