adsst-sharc-mel-100 Analog Devices, Inc., adsst-sharc-mel-100 Datasheet - Page 12

• Manufacturer Part Number: adsst-sharc-mel-100
• Description: Sharc Mel-100 Audio Processor
• Manufacturer: Analog Devices, Inc.

ADSST-SHARC-Mel-100
PIN FUNCTION DESCRIPTIONS
The SHARC Mel-100 pin definitions can be found in Table 2
beginning on page 13. Inputs identified as synchronous (S)
must meet timing requirements with respect to CLKIN (or with
respect to TCK for TMS, TDI). Inputs identified as
asynchronous (A) can be asserted asynchronously to CLKIN (or
to TCK for TRST ). Tie or pull unused inputs to V
except for the following:
Figure 10. JTAG Target Board Connector with No Local Boundary Scan
• ADDR23–0, DATA47–0, BRST, CLKOUT. (Note that
• PA , ACK, RD , WR , DMARx , DMAGx , (ID2–0 = 00x).
• LxCLK, LxACK, LxDAT7–0 (LxPDRDE = 0). (Note: See
• DxA, DxB, SCLKx, SPICLK, MISO, MOSI, EMU ,
these pins have a logic level hold circuit enabled on the
SHARC Mel-100 DSP with ID2–0 = 00x.)
(Note that these pins have a pull-up enabled on the
SHARC Mel-100 DSP with ID2–0 = 00x.)
Link Port Buffer Control Register Bit definitions in the
SHARC Mel-100 DSP Hardware Reference.)
TMS, TRST , TDI. (Note that these pins have a pull-up.)
Figure 9. JTAG Target Board Connector for JTAG Equipped
KEY (NO PIN)
Analog Devices DSP (Jumpers in Place)
KEY (NO PIN)
BTRST
BTMS
BTCK
BTRST
BTDI
GND
GND
BTMS
BTCK
GND
BTDI
GND
11
13
1
3
5
7
9
TOP VIEW
11
13
1
3
5
7
9
9
TOP VIEW
14
10
12
2
4
6
8
14
10
12
2
4
6
8
EMU
GND
TMS
TCK
TRST
TDI
TDO
TRST
TDI
TDO
EMU
GND
TMS
TCK
DDEXT
or GND,
Rev. 0 | Page 12 of 28
The following symbols appear in the Type column of Table 2:
A
G
I
O
P
S
(A/D)
(O/D)
T
Unlike previous SHARC processors, the SHARC Mel-100
contains internal series resistance equivalent to 50 Ω on all
input/output drivers except the CLKIN and XTAL pins.
Therefore, for traces longer than six inches, external series
resistors on control, data, clock, or frame sync pins are not
required to dampen reflections from transmission line effects
for point-to-point connections. However, for more complex
networks such as star configurations, series termination is still
recommended.
Asynchronous,
Ground,
Input,
Output,
Power Supply,
Synchronous,
Active Drive,
Open Drain,
Three-State (when SBTS is asserted or when the
SHARC Mel-100 is a bus slave).
Figure 12. JTAG Pod Connector Keep-Out Area
Figure 11. JTAG Pod Connector Dimensions
0.64"
0.15"
0.88"
0.24"
0.10"