s71pl512nd0 Meet Spansion Inc., s71pl512nd0 Datasheet - Page 64

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s71pl512nd0

Manufacturer Part Number
s71pl512nd0
Description
Two S29pl256n Devices 32 M X 16-bit Cmos 3.0-volt Only Simultaneous Read/write, Page-mode Flash Memory
Manufacturer
Meet Spansion Inc.
Datasheet
62
13.8.4 Erase/Program Timing
Notes:
1.
2.
3.
4.
t
t
t
JEDEC
t
t
t
t
t
t
WHWH1
WHWH1
WHWH2
t
t
t
t
DVWH
WHDX
GHWL
WHEH
WLWH
WHDL
AVWL
WLAX
AVAV
ELWL
Not 100% tested.
In program operation timing, addresses are latched on the falling edge of WE# .
See
Does not include the preprogramming time.
Parameter
Program/Erase Operations
t
t
t
WHWH1
WHWH1
WHWH2
t
t
t
t
t
t
t
GHWL
t
t
SR/W
t
t
t
t
t
Std
t
OEPH
BUSY
t
t
t
t
t
t
t
WPH
VHH
t
WEP
ASO
AHT
SEA
ASP
ESL
PSL
PSP
WC
WP
AS
AH
DS
DH
CS
CH
RB
Write Cycle Time (1)
Address Setup Time
Address Setup Time to OE# low during toggle bit polling
Address Hold Time
Address Hold Time From CE# or OE# high during toggle bit polling
Data Setup Time
Data Hold Time
Output Enable High during toggle bit polling
Read Recovery Time Before Write 
(OE# High to WE# Low)
CE# Setup Time
CE# Hold Time
Write Pulse Width
Write Pulse Width High
Latency Between Read and Write Operations
Programming Operation
Accelerated Programming Operation
Sector Erase Operation
V
Write Recovery Time from RY/BY#
Program/Erase Valid to RY/BY# Delay
Noise Pulse Margin on WE#
Sector Erase Accept Time-out
Erase Suspend Latency
Program Suspend Latency
Toggle Time During Sector Protection
Toggle Time During Programming Within a Protected Sector
HH
Rise and Fall Times
S29PL-N MirrorBit™ Flash Family
for more information.
P r e l i m i n a r y
Description (Notes)
S29PL-N_M0_A4 November 23, 2005
Max
Max
Max
Max
Max
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Typ
Typ
Typ
Min
Min
Typ
Typ
Speed Options
65
65
250
100
1.6
70
15
35
30
10
40
25
40
24
90
50
20
20
70
0
0
0
0
0
0
0
0
3
1
80
80
Unit
sec
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
ns
ns
µs
µs
µs
µs
ns
ns
ns
ns
µs

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