s71pl512nd0 Meet Spansion Inc., s71pl512nd0 Datasheet - Page 30

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s71pl512nd0

Manufacturer Part Number
s71pl512nd0
Description
Two S29pl256n Devices 32 M X 16-bit Cmos 3.0-volt Only Simultaneous Read/write, Page-mode Flash Memory
Manufacturer
Meet Spansion Inc.
Datasheet
28
9.4.4 Chip Erase Command Sequence
No
Notes:
1.
2.
Chip erase is a six-bus cycle operation as indicated by
Embedded Erase algorithm, which does not require the system to preprogram prior to erase. The
Embedded Erase algorithm automatically preprograms and verifies the entire memory for an all
zero data pattern prior to electrical erase. The system is not required to provide any controls or
timings during these operations. The Command Definition tables
show the address and data requirements for the chip erase command sequence.
No
See
See the section on DQ3 for information on the sector erase timeout.
PASS. Device returns
PASS. Device returns
to reading array.
to reading array.
Table 15.1
DQ3 = 1?
Poll DQ3.
Yes
DQ3 = 1?
Poll DQ3.
Yes
Yes
No
Yes
No
for erase command sequence.
Write Sector Erase Cycles:
Sector Address, Data 30h
Address 555h, Data AAh
Address 2AAh, Data 55h
Address 555h, Data AAh
Perform Write Operation
Write Sector Erase Cycles:
Address 555h, Data 80h
Address 2AAh, Data 55h
Sector Address, Data 30h
Address 555h, Data AAh
Address 2AAh, Data 55h
Address 555h, Data AAh
Address 555h, Data 80h
Perform Write Operation
Address 2AAh, Data 55h
Write Unlock Cycles:
Write Unlock Cycles:
Sector Addresses
Write Additional
Status Algorithm
Sector Addresses
Status Algorithm
Write Additional
Wait 4 µs
Additional
DQ5 = 1?
Sectors?
Wait 4 µs
DQ5 = 1?
Additional
Done?
Sectors?
Yes
Select
S29PL-N MirrorBit™ Flash Family
Done?
Select
Yes
Yes
No
Yes
Yes
No
Yes
Figure 9.3 Sector Erase Operation
FAIL. Write reset command
to return to reading array.
Last Sector
FAIL. Write reset command
to return to reading array.
Last Sector
Selected?
Selected?
P r e l i m i n a r y
No
No
No
No
• Each additional cycle must be written within t
• Timeout resets after each additional cycle is written
• The host system may monitor DQ3 or wait t
• No limit on number of sectors
• Commands other than Erase Suspend or selecting
Unlock Cycle 1
Unlock Cycle 2
Command Cycle 1
Command Cycle 2
Command Cycle 3
Specify first sector for erasure
Status may be obtained by reading DQ7, DQ6 and/or DQ2.
Error condition (Exceeded Timing Limits)
• Each additional cycle must be written within t
• Timeout resets after each additional cycle is written
• The host system may monitor DQ3 or wait t
• No limit on number of sectors
• Commands other than Erase Suspend or selecting
Unlock Cycle 1
Unlock Cycle 2
Command Cycle 1
Command Cycle 2
Command Cycle 3
Specify first sector for erasure
Status may be obtained by reading DQ7, DQ6 and/or DQ2.
Error condition (Exceeded Timing Limits)
acceptance of erase commands
additional sectors for erasure during timeout reset device
to reading array data
acceptance of erase commands
additional sectors for erasure during timeout reset device
to reading array data
Table
15.1. These commands invoke the
(Table 15.1
S29PL-N_M0_A4 November 23, 2005
and
Table
SEA
SEA
SEA
SEA
to ensure
to ensure
timeout
timeout
15.2)

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