s71pl512nd0 Meet Spansion Inc., s71pl512nd0 Datasheet - Page 34

• Manufacturer Part Number: s71pl512nd0
• Description: Two S29pl256n Devices 32 M X 16-bit Cmos 3.0-volt Only Simultaneous Read/write, Page-mode Flash Memory
• Manufacturer: Meet Spansion Inc.

32
9.4.8 Unlock Bypass
Bypass mode, the full 3-cycle RESET command sequence must be used to reset the device. Re-
moving V
returns the device to normal operation.
T Sectors must be unlocked prior to raising WP#/ACC to V
T The WP#/ACC must not be at V
T Set the ACC pin at V
The device features an Unlock Bypass mode to facilitate faster word programming. Once the de-
vice enters the Unlock Bypass mode, only two write cycles are required to program data, instead
of the normal four cycles.
This mode dispenses with the initial two unlock cycles required in the standard program command
sequence, resulting in faster total programming time.
shows the requirements for the unlock bypass command sequences.
During the unlock bypass mode, only the Read, Unlock Bypass Program and Unlock Bypass Reset
commands are valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock
bypass reset command sequence. The first cycle must contain the bank address and the data 90h.
The second cycle need only contain the data 00h. The bank then returns to the read mode.
The following are C source code examples of using the unlock bypass entry, program, and exit
functions. Refer to the Spansion Low Level Driver User’s Guide (available soon on
and www.fujitsu.com) for general information on Spansion Flash memory software development
guidelines.
/* Example: Unlock Bypass Entry Command
Software Functions and Sample Code
*((UINT16 *)bank_addr + 0x555) = 0x00AA;
*((UINT16 *)bank_addr + 0x2AA) = 0x0055;
*((UINT16 *)bank_addr + 0x555) = 0x0020;
/* At this point, programming only takes two write cycles.
/* Once you enter Unlock Bypass Mode, do a series of like
/* operations (programming or sector erase) and then exit
/* Unlock Bypass Mode before beginning a different type of
/* operations.
accelerated chip erase, or device damage can result.
Cycle
1
2
3
HH
from the ACC input, upon completion of the embedded program or erase operation,
Entry Command
Description
Unlock
Unlock
CC
S29PL-N MirrorBit™ Flash Family
when accelerated programming not in use.
(LLD Function = lld_UnlockBypassEntryCmd)
Table 9.15 Unlock Bypass Entry
HH
P r e l i m i n a r y
for operations other than accelerated programming and
*/
/* write unlock cycle 1
/* write unlock cycle 2
/* write unlock bypass command
Operation
Write
Write
Write
Table 15.1, Memory Array Commands
*/
*/
*/
*/
*/
HH
.
Word Address
Base + 2AAh
Base + 555h
Base + 555h
S29PL-N_M0_A4 November 23, 2005
*/
*/
*/
www.amd.com
00AAh
0055h
0020h
Data