zl50110gag2 Zarlink Semiconductor, zl50110gag2 Datasheet - Page 71

• Manufacturer Part Number: zl50110gag2
• Description: 1024 Channel 32 T1/e1, 2 T3/e3 Cesop Processor With Triple Ethernet Interface
• Manufacturer: Zarlink Semiconductor

7.6.2
The central Ethernet Switch configuration can be extended to include a redundant switch connected to the second
ZL50110/11/12/14 GMII port. One port should be used for all the TDM-to-Packet and Packet-to-TDM data with the
other port idle. If the current port fails then data must be transferred to the spare port.
7.7
To power up the ZL50110/11/12/14 the following procedure must be used:
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•
•
•
This is illustrated in the diagram shown in Figure 24.
The I/O supply should lead the Core supply, or both can be brought up together
The I/O supply must never exceed the Core supply by more than 2.0VDC
The Core supply must never exceed the I/O supply by more than 0.5VDC
The System Reset and the JTAG Reset must remain low until at least 100 µs after the 100 MHz system clock
has stabilised. Note that if JTAG Reset is not used it must be tied low.
Power Up sequence
Redundant Ethernet Switch
GMII
ZL5011x
TDM
Figure 23 - Gigabit Ethernet Connection - Redundant Ethernet Switch
GMII
Ethernet Switch
GMII
Network
ZL5011x
TDM
ZL50110/11/12/14
Zarlink Semiconductor Inc.
GMII
71
Ethernet Switch
GMII
Network
ZL5011x
TDM
GMII
GMII
ZL5011x
TDM
GMII
Data Sheet