zl50110gag2 Zarlink Semiconductor, zl50110gag2 Datasheet - Page 27

• Manufacturer Part Number: zl50110gag2
• Description: 1024 Channel 32 T1/e1, 2 T3/e3 Cesop Processor With Triple Ethernet Interface
• Manufacturer: Zarlink Semiconductor

Note: Speed modes:
Note: All TDM Interface inputs (including data, clock and frame pulse) have internal pull-down resistors so they can be safely left
TDM_CLKo[15:0]
2.048 Mbps - all 16 streams active (bits [15:0]), with 32 channels per stream - 512 total channels.
8.192 Mbps - 4 streams active (bits [3:0]), with 128 channels per stream - 512 total channels.
J2 - 4 streams active (bits [3:0]), with 98 channels per stream - 392 total channels.
unconnected if not used.
Signal
Table 3 - TDM Interface ZL50112 Stream Pin Definition (continued)
I/O
O
Package Balls
ZL50110/11/12/14
Zarlink Semiconductor Inc.
[15]
[14]
[13]
[12]
[11]
[10]
[9]
[8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
27
A16
C14
A12
E13
D12
A9
C9
B8
D10
B6
F11
E8
A3
C6
C4
F9
TDM port clock outputs. Will generate
1.544 MHz, 2.048 MHz, 4.096 MHz,
6.312 MHz, 8.192 MHz, 16.384 MHz
depending on standard used. At
8.192 Mbps only streams [3:0] are used.
Streams [3:0] are used for J2.
Description
Data Sheet