zl50011 Zarlink Semiconductor, zl50011 Datasheet - Page 64

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zl50011

Manufacturer Part Number
zl50011
Description
Flexible 512 Channel Dx With On-chip Dpll
Manufacturer
Zarlink Semiconductor
Datasheet
8.0
When A11 is high, the data or the connection memory can be accessed by the microprocessor port. The Bit 0 to Bit
2 in the control register determine the access to the data or connection memory
Notes:
1. MSB of address must be high for access to data and connection memory positions. MSB must be low for access to registers.
2. Channels 0 to 31 are used when serial stream is at 2.048 Mbps.
3. Channels 0 to 63 are used when serial stream is at 4.096 Mbps.
4. Channels 0 to 127 are used when serial stream is at 8.192 Mbps.
External
Address
(Note 1)
(A11)
Memory Address Mappings
MSB
1
1
1
1
1
1
1
1
1
1
1
.
.
.
.
.
Table 32 - Address Map for Memory Locations (512x512 DX, MSB of address = 1)
A10
0
0
0
0
0
0
0
0
0
1
1
.
.
.
.
.
A9
0
0
0
0
1
1
1
1
1
1
1
.
.
.
.
.
Stream Address
A8
(ST. 0-15)
0
0
1
1
0
0
1
1
0
1
1
.
.
.
.
.
A7
0
1
0
1
0
1
0
1
0
0
1
.
.
.
.
.
Stream 0
Stream 1
Stream 2
Stream 3
Stream 4
Stream 5
Stream 6
Stream 7
Stream 8
.
.
.
.
.
Stream
14
Stream
15
Stream #
Zarlink Semiconductor Inc.
ZL50011
64
A6
0
0
0
0
0
0
0
0
1
1
.
.
.
.
.
.
A5
0
0
0
0
1
1
1
1
1
1
.
.
.
.
.
.
A4
0
0
1
1
0
0
1
1
1
1
.
.
.
.
.
.
A3
0
0
1
1
0
0
1
1
1
1
.
.
.
.
.
.
Channel Address
A2
0
0
1
1
0
0
1
1
1
1
(Ch 0-127)
.
.
.
.
.
.
A1
0
0
1
1
0
0
1
1
1
1
.
.
.
.
.
.
A0
0
1
0
1
0
1
0
1
0
1
.
.
.
.
.
.
Ch 0
Ch 1
.
.
Ch 30
Ch 31 (Note 2)
Ch 32
Ch 33
.
.
Ch 62
Ch 63 (Note 3)
.
.
Ch 126
Ch 127 (Note
4)
Channel #
Data Sheet

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