mt90224 Zarlink Semiconductor, mt90224 Datasheet - Page 148

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mt90224

Manufacturer Part Number
mt90224
Description
8-port Ima/tc Phy Device
Manufacturer
Zarlink Semiconductor
Datasheet
Note ‡ : Typical figures are at 25
AC Electrical Characteristics - System Clock and Reset
CLK period width
CLK period width LOW
CLK period width HIGH
CLK falling
RESET pulse width
CLK rising
RESET
CLK
1. The System Clock period cannot be longer than the TX or RX Utopia clock period.
Parameter
1
°
C, V
DD
=3.3 V, and for design aid only: not guaranteed and not subject to production testing
Symbol
t
t
t
t
t
CLKH
CLKR
CLKF
t
CLKL
CLK
RST
Figure 40 - System Clock and Reset
Zarlink Semiconductor Inc.
MT90222/3/4
t
Min.
rst
8.5
8.5
19
10
t
148
clkr
t
Typ.
clkf
20
10
10
Max.
20
6
6
t
clkh
t
clk
period
Units
t
clkl
clk
ns
ns
ns
ns
ns
For full operation of
TDM Ring,
otherwise could be
longer
The min CLK period
width restrictions still
need to be
maintained
The minimum time is
measured at 1.4V
Between 10%-90%
of voltage levels
Between 10%-90%
of voltage levels
Test Conditions
Data Sheet

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