zl30410 Zarlink Semiconductor, zl30410 Datasheet - Page 20

• Manufacturer Part Number: zl30410
• Description: Multi-service Line Card Pll
• Manufacturer: Zarlink Semiconductor

The Core PLL will automatically return to the Normal state after the reference signal recovers from failure. This
transition is shown on the state diagram as a FAIL --> OK change. This change becomes effective when the
reference is restored and there have been no phase hits detected for at least 64 clock cycles for the
1.544/2.048 MHz reference, 512 clock cycles for the 19.44 MHz reference and 1 clock cycle for the 8 kHz
reference.
This transition from Auto Holdover to Normal mode is performed as “hit-less” recovery for 1.544 MHz, 2.048 MHz
and 19.44 MHz references. For the 8 kHz input reference, the recovery from Auto Holdover state must transition
through the Holdover state to guarantee “hit-less” recovery (for details see section 5.1.3 on page 20).
5.1.3
The sequence starts from the Normal state and transitions to Auto Holdover state due to an unforeseen loss of the
8 kHz reference. The failure conditions triggering this transition are described in section 4.1.2. When in the Auto
Holdover state, the ZL30410 can return to Normal mode automatically but this transition may exceed Output Phase
Continuity limits specified in the Performance Characteristic Table listed in section “Performance Characteristics”
on page 30. This probable time interval error is avoidable by forcing the PLL into Holdover state immediately after
detection of the 8 kHz reference failure. While in Holdover state the ZL30410 will continue monitoring quality of the
input reference (if a proper ±4.6 ppm Master Clock oscillator is employed) and after detecting the presence of a
valid reference it can be switched into Normal state. When the Master Clock Oscillator accuracy exceeds ±4.6 ppm
range (leading to inaccurate internal out-of-range detection) then an external method for detecting the presence of
the clock should be employed to switch the ZL30410 into Normal state (0.1 sec after detecting the presence of a
valid 8 kHz reference).
5.1.4
The NORMAL to AUTO-HOLDOVER to HOLDOVER to NORMAL sequence represents the most likely operation of
the ZL30410.
The sequence starts from the Normal state and transitions to Auto Holdover state due to an unforeseen loss of
reference. The failure conditions triggering this transition were described in section 4.1.2. When in the Auto
Holdover state, the ZL30410 can return to Normal mode automatically if the lost reference is restored. This
transition from Auto Holdover to Normal mode is performed as “hit-less” recovery for 1.544 MHz, 2.048 MHz and
Figure 10 - Recovery Procedure from a Single 8 kHz Reference Failure by Transitioning Through
RESET=1
NORMAL
Single 8 kHz Reference Operation: NORMAL --> AUTO HOLDOVER--> HOLDOVER -->
Dual Reference Operation: NORMAL --> AUTO HOLDOVER--> HOLDOVER --> NORMAL
RESET
unconditional return from
any state to Free-run
MS2,MS1=10 forces
FREE-
RUN
10
MS2,MS1=00
MS2,MS1=01
OR
MS2,MS1=01 OR
RefSel change
HOLD-
OVER
01
Zarlink Semiconductor Inc.
MS2,MS1=00
Ref: OK AND
the Holdover State
ZL30410
{AUTO}
20
when HOLDOVER 0-->1
then set MS2,MS1=01
NORMAL
00
Ref: OK-->FAIL AND
MS2,MS1=00
{AUTO}
HOLD-
OVER
AUTO
{AUTO}
Ref: FAIL-->OK AND
MS2,MS1=00
Data Sheet