zl30410 Zarlink Semiconductor, zl30410 Datasheet - Page 11

• Manufacturer Part Number: zl30410
• Description: Multi-service Line Card Pll
• Manufacturer: Zarlink Semiconductor

3.2.1
The DCO is an arithmetic unit that continuously generates a stream of numbers that represent the phase-locked
clock. These numbers are passed to the Clock Synthesizer (see section 3.3) where they are converted into
electrical clock signals of various frequencies.
3.2.2
In Normal mode, the clock generated by the DCO is phase-locked to the input reference signal and band-limited to
meet synchronization standards. The ZL30410 provides two hardware selectable (FCS pin) filtering options. The
filtering characteristics are similar to a first order low pass filter with corner frequencies that support international
standards:
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•
3.2.3
The ZL30410 is considered locked (LOCK pin high) when the residual phase movement after declaring locked
condition does not exceed 20 ns; as required by standard wander generation MTIE and TDEV tests. To ensure the
integrity of the LOCK status indication, the ZL30410 holds LOCK pin low for a minimum of one second before
declaring lock. The ZL30410’s locking process allows it to lock within the specified locking times to references with
a fractional frequency offset of up to ±20 ppm.
3.2.4
When the ZL30410 finishes locking to a reference an arbitrary phase difference will remain between its output
clocks and its reference; this phase difference is part of the normal operation of the ZL30410. If so desired, the
output clocks can be brought into phase alignment with the PLL reference by using the RefAlign control pin.
6 Hz filter: supports G.813 Option 1 Clock
12 Hz filter: supports line card applications for G.812, G.813, GR-1244 and GR-253
Digitally Controlled Oscillator (DCO)
Filters
Lock Indicator (LOCK)
Reference Alignment (RefAlign)
MUX
HOLDOVER
RefAlign
LOCK
Figure 3 - Core PLL Functional Block Diagram
Detector
Phase
FSM
Zarlink Semiconductor Inc.
ZL30410
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Filters
FCS
DCO
Data Sheet