zl30410 Zarlink Semiconductor, zl30410 Datasheet - Page 12

• Manufacturer Part Number: zl30410
• Description: Multi-service Line Card Pll
• Manufacturer: Zarlink Semiconductor

3.2.4.1
If the ZL30410 is locked to a 1.544 MHz, 2.048 MHz or 19.44 MHz reference, then the output clocks can be brought
into phase alignment with the PLL reference by using the RefAlign control pin according to the following procedure:
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•
•
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After initiating a reference realignment the PLL will enter Holdover mode for 200ns while aligning the internal clocks
to remove static phase error. The PLL will then begin the normal locking procedure.
3.2.4.2
If the ZL30410 is locked to an 8 kHz reference, then the output clocks can be brought into phase alignment with the
PLL reference by using the RefAlign control pin according to the following procedure:
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•
•
•
After initiating a reference realignment the PLL will enter Holdover mode for 200 ns while aligning the internal
clocks to remove static phase error. The PLL will then begin the normal locking procedure.
3.3
The output of the Core PLL is connected to the Clock Synthesizer that generates twelve clocks and three frame
pulses.
3.3.1
The ZL30410 provides the following clocks (see Figure 15 "ST-BUS and GCI Output Timing", Figure 16 "DS1 and
DS2 Clock Timing", Figure 17 "C155o and C19o Timing", and Figure 20 "E3 and DS3 Output Timing" for details):
Wait until the ZL30410 LOCK indication is high, indicating that it is locked
Pull RefAlign low
Hold RefAlign low for 250 µs
Pull RefAlign high
Wait until the ZL30410 LOCK indication is high, indicating that it is locked
Pull RefAlign low
Hold RefAlign low for 3 sec
Pull RefAlign high
- C1.5o
- C2o
- C4o
- C6o
- C8o
- C8.5o
- C11o
- C16o
- C19o
- C34o
- C44o
Clock Synthesizer
Output Clocks
Using RefAlign with 1.544 MHz, 2.048 MHz or 19.44 MHz Reference
Using RefAlign with an 8 kHz Reference
: 1.544 MHz clock with nominal 50% duty cycle
: 2.048 MHz clock with nominal 50% duty cycle
: 4.096 MHz clock with nominal 50% duty cycle
: 6.312 MHz clock with nominal 50% duty cycle
: 8.192 MHz clock with nominal 50% duty cycle
: 8.592 MHz clock with duty cycle from 30 to 70%.
: 11.184 MHz clock with duty cycle from 30 to 70%.
: 16.384 MHz clock with nominal 50% duty cycle
: 19.44 MHz clock with nominal 50% duty cycle
: 34.368 MHz clock with nominal 50% duty cycle
: 44.736 MHz clock with nominal 50% duty cycle
Zarlink Semiconductor Inc.
ZL30410
12
Data Sheet