m52s128324a Elite Semiconductor Memory Technology Inc., m52s128324a Datasheet - Page 42

• Manufacturer Part Number: m52s128324a
• Description: 1m X 32 Bit X 4 Banks Synchronous Dram
• Manufacturer: Elite Semiconductor Memory Technology Inc.

B A 0 , B A 1
C L O C K
A 1 0 / A P
ESMT
Self Refresh Entry & Exit Cycle
*Note : TO ENTER SELF REFRESH MODE
Elite Semiconductor Memory Technology Inc.
A D D R
C K E
D Q M
C A S
R A S
W E
D Q
C S
1. CS , RAS & CAS with CKE should be low at the same clock cycle.
2. After 1 clock cycle, all the inputs including the system clock can be don’t care except for CKE.
3. The device remains in self refresh mode as long as CKE stays “Low”.
TO EXIT SELF REFRESH MODE
4. System clock restart and be stable before returning CKE high.
5. CS starts from high.
6. Minimum t
7. 4K cycles of burst auto refresh is required immediately before self refresh entry and immediately after self refresh exit.
cf.) Once the device enters self refresh mode, minimum t
0
S e l f R e f r e s h E n t r y
1
* N o t e 1
t
S S
RC
2
is required after CKE going high to complete self refresh exit.
H i - Z
* N o t e 2
3
4
5
6
* N o t e 3
7
8
9
RAS
S e l f R e f r e s h E x i t
1 0
* N o t e 4
is required before exit from self refresh.
H i - Z
1 1
* N o t e 5
1 2
1 3
t
R C m i n
Publication Date: Mar. 2009
Revision: 1.4
1 4
* N o t e 6
M52S128324A
A u t o R e f r e s h
1 5
* N o t e 7
1 6
1 7
: D o n ' t c a r e
1 8
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