m52s128324a Elite Semiconductor Memory Technology Inc., m52s128324a Datasheet - Page 28

• Manufacturer Part Number: m52s128324a
• Description: 1m X 32 Bit X 4 Banks Synchronous Dram
• Manufacturer: Elite Semiconductor Memory Technology Inc.

ESMT
FUNCTION TRUTH TABLE (TABLE2)
Abbreviations : ABI = All Banks Idle, RA = Row Address
*Note : 6.CKE low to high transition is asynchronous.
Elite Semiconductor Memory Technology Inc.
Precharge
other than
Any State
Current
Refresh
Banks
Power
Banks
above
Listed
Down
State
Self
Idle
All
All
7.CKE low to high transition is asynchronous if restart internal clock.
8.Power down and self refresh can be entered only from the all banks idle state.
9.Must be a legal command.
A minimum setup time 1CLK + t
( n-1 )
CKE
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
CKE
X
H
H
H
H
H
X
H
H
H
H
H
H
H
H
n
L
L
L
L
L
L
L
L
L
L
L
L
CS RAS CAS WE
H
H
H
X
X
X
L
L
X
X
L
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
SS
must be satisfy before any command other than exit.
H
H
H
H
H
H
H
X
X
X
L
X
X
X
X
L
X
X
X
X
L
L
L
X
X
X
X
X
X
H
X
X
X
X
X
H
X
X
X
X
X
H
X
H
H
X
X
X
X
X
L
L
L
L
OP Code
ADDR
RA
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
INVALID
Exit Self Refresh
Exit Self Refresh
ILLEGAL
ILLEGAL
ILLEGAL
NOP (Maintain Self Refresh)
INVALID
Exit Self Refresh
Exit Self Refresh
ILLEGAL
ILLEGAL
ILLEGAL
NOP (Maintain Low Power Mode)
Refer to Table1
Enter Power Down
Enter Power Down
ILLEGAL
ILLEGAL
Row (& Bank) Active
Enter Self Refresh
Mode Register Access
NOP
Refer to Operations in Table 1
Begin Clock Suspend next cycle
Exit Clock Suspend next cycle
Maintain Clock Suspend
ACTION
Publication Date: Mar. 2009
Revision: 1.4
Idle after t
Idle after t
ABI
ABI
M52S128324A
RC
RC
(ABI)
(ABI)
28/47
Note
6
6
7
7
8
8
8
9
9