ft7521 Fairchild Semiconductor, ft7521 Datasheet

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ft7521

Manufacturer Part Number
ft7521
Description
Reset Timer With Fixed Delay Time And Reset Pulse
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2009 Fairchild Semiconductor Corporation
FT7521 • Rev. 1.0.1
FT7521
Reset Timer with Fixed Delay Time and Reset Pulse
Features
Applications
Ordering Information
Part Number
FT7521L6X
Fixed Reset Delay: 7.5 Seconds
One Input Reset Pin
Open-Drain Output Pin with Fixed 400ms Pulse
2.0V to 5.0V Operation
<1µA I
0-Second Test-Mode Enable
Integrated Pull-Up Resistor on /SRO
Cell Phones
Portable Media Players
Tablets
Mobile Devices
Consumer Medical
CCQ
Consumption
Temperature Range
-40C to +85C
Operating
6-Lead, MicroPak™ 1.0 x 1.45mm, JEDEC MO-252
Description
The FT7521 is a timer for resetting a mobile device
where long reset times are needed. The long delay
helps avoid unintended resets caused by accidental key
presses. It has a fixed delay of 7.5 ±20% seconds. The
DSR pin enables Test Mode operation by immediately
forcing /RST1 LOW for factory testing.
The FT7521 has one input for single-button resetting
capability. The device has a single open-drain output
with 0.5mA pull-down drive.
FT7521 draws minimal I
functions over a power supply range of 2.0V to 5.0V.
Package
CC
current when inactive and
Tape and Reel
January 2011
5000 Units on
www.fairchildsemi.com
Packing
Method

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ft7521 Summary of contents

Page 1

... Fairchild Semiconductor Corporation FT7521 • Rev. 1.0.1 Description The FT7521 is a timer for resetting a mobile device where long reset times are needed. The long delay helps avoid unintended resets caused by accidental key presses. It has a fixed delay of 7.5 ±20% seconds. The DSR pin enables Test Mode operation by immediately forcing /RST1 LOW for factory testing ...

Page 2

... Used for device testing; should be tied to GND 6 TEST during normal use. Note: 1. This pin must always be tied to either GND or VCC. It must not float. © 2009 Fairchild Semiconductor Corporation FT7521 • Rev. 1.0.1 Figure 1. Block Diagram Figure 2. Pad Assignments (Top-Through View) Description Normal Operation (1 ...

Page 3

... Functional Description Device default operation time N is 7.5s. If the DSR pin is pulled HIGH prior to V ramp, the FT7521 enters Test CC Mode and the reset output, /RST1, is immediately pulled LOW for factory testing. The DSR pin MUST be forced to GND during normal operation. The DSR pin should never be driven HIGH or left to FLOAT during normal operation ...

Page 4

... IN V Output Voltage OUT I DC Output Sink Current OL T Free-Air Operating Temperature A  Thermal Resistance JA © 2009 Fairchild Semiconductor Corporation FT7521 • Rev. 1.0.1 Conditions /SR0, DSR /RST1 V < < 0V OUT Human Body Model, JESD22-A114 Charged Device Model, JESD22-C101 Conditions V =0V After Power Down, CC Rising to 0 ...

Page 5

... PHL1 t Reset Timeout Delay REC Capacitance Specifications T =+25C. A Symbol Parameter C Input Capacitance IN C Output Capacitance OUT © 2009 Fairchild Semiconductor Corporation FT7521 • Rev. 1.0.1 Conditions Min. DSR, /SR0 0. DSR, /SR0 RST, I =500µ  V  5.0V IN /SR0=V ...

Page 6

... AC Test Circuit and Waveforms Figure 4. © 2009 Fairchild Semiconductor Corporation FT7521 • Rev. 1.0.1 AC Test Circuit and Waveforms for /RST1 Output ST Output 6 www.fairchildsemi.com ...

Page 7

... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2009 Fairchild Semiconductor Corporation FT7521 • Rev. 1.0 ...

Page 8

... Fairchild Semiconductor Corporation FT7521 • Rev. 1.0.1 8 www.fairchildsemi.com ...

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