a3p1000-1pqg208m Actel Corporation, a3p1000-1pqg208m Datasheet - Page 140
a3p1000-1pqg208m
Manufacturer Part Number
a3p1000-1pqg208m
Description
Fpga Proasic 3 Family 1m Gates 130nm Cmos Technology 1.5v 208-pin Pqfp
Manufacturer
Actel Corporation
Datasheet
1.A3P1000-1PQG208M.pdf
(182 pages)
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Military ProASIC3/EL DC and Switching Characteristics
Table 2-186 • RAM4K9
2- 12 6
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
F
Note:
AS
AH
ENS
ENH
BKS
BKH
DS
DH
CKQ1
CKQ2
WRO
CCKH
RSTBQ
REMRSTB
RECRSTB
MPWRSTB
CYC
MAX
For specific junction temperature and voltage supply levels, refer to
Military-Case Conditions: T
Address setup time
Address hold time
REN_B, WEN_B setup time
REN_B, WEN_B hold time
BLK_B setup time
BLK_B hold time
Input data (DI) setup time
Input data (DI) hold time
Clock HIGH to new data valid on DO (output retained, WMODE = 0)
Clock HIGH to new data valid on DO (flow-through, WMODE = 1)
Clock HIGH to new data valid on DO (pipelined)
Address collision clk-to-clk delay for reliable read access after write on same
address
Address collision clk-to-clk delay for reliable write access after write/read on same
address
RESET_B LOW to data out LOW on DO (flow-through)
RESET_B LOW to data out LOW on DO (pipelined)
RESET_B removal
RESET_B recovery
RESET_B minimum pulse width
Clock cycle time
Maximum frequency
J
= 125°C, Worst-Case VCC = 1.425 V for A3P1000
Description
R e visio n 0
Table 2-6 on page 2-8
for derating values.
0.30 0.35
0.00 0.00
0.17 0.20
0.12 0.14
0.28 0.33
0.02 0.03
0.22 0.26
0.00 0.00
2.15 2.53
2.84 3.33
1.08 1.27
TBD TBD
TBD TBD
0.34 0.40
1.81 2.12
0.26 0.30
3.89 4.57
1.11 1.31
1.11 1.31
257 219
–1
Std.
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
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