wm8580a Wolfson Microelectronics plc, wm8580a Datasheet - Page 89

• Manufacturer Part Number: wm8580a
• Description: Multichannel Codec With S/pdif Transceiver
• Manufacturer: Wolfson Microelectronics plc

Master Digital
Production Data
w
Attenuation
Attenuation
REGISTER
SPDTXCHAN 0
ADDRESS
Control 1
DACR 3
ADC
19h
R28
1Ch
R29
1Dh
R30
1Eh
BIT
7:0
7:5
1:0
8
8
0
1
2
3
4
8
2
3
4
TXVAL_OVWR
ADCRATE[2:0]
MASTDA[7:0]
AMUTEALL
TXSRC[1:0]
OVWCHAN
THROUGH
VMIDSEL
AMUTER
ADCOSR
ADCHPD
UPDATE
UPDATE
AMUTEL
LABEL
REAL_
Not latched
Not latched
11111111
DEFAULT
(0dB)
010
10
1
0
0
0
0
0
0
0
0
Controls simultaneous update of all Attenuation Latches
Digital Attenuation control for all DAC channels in 0.5dB steps.
See Table 23
Controls simultaneous update of all Attenuation Latches
ADC Mute select
ADC Mute select
ADC Mute select
ADC oversample rate select
ADC high-pass filter disable:
ADC Rate Control (only used when the S/PDIF Transmitter is the
only interface sourcing the ADC)
VMID Impedance Selection
S/PDIF Transmitter Data Source
Only used if TXSRC==00. Overwrites the ‘through-path’ Channel
Bit with values determined by the channel-bit control registers.
S/PDIF Through Mode Control
S/PDIF Transmitter Validity Overwrite Mode
0 = Normal Operation
1 = mute ADC left
0 = Normal Operation
1 = mute ADC right
0 = Normal Operation
1 = mute both ADC channels
0 = high-pass filter enabled
1 = high-pass filter disabled
0 = Store RDA3 in intermediate latch (no change to output)
1 = Apply RDA3 and update attenuation on all channels
0 = Store gain in intermediate latch (no change to output)
1 = Apply gain and update attenuation on all channels
0 = 128/64 x oversampling
1 = 64/32 x oversampling
000 = 128fs
001 = 192fs
010 = 256fs
011 = 384fs
100 = 512fs
101 = 768fs
110 = 1152fs
0 = Channel data equal to recovered channel data.
1 = Channel data taken from channel status registers.
0 = disabled, validity bit is 0 when transmitter sources ADC,
PAIF or SAIF, or is matches the S/PDIF input validity when
S/PDIF transmitter sources S/PDIF receiver.
1 = enabled, validity bit transmitted for subframe 0 is defined
by TXVAL_SF0, validity bit transmitted for subframe 1 is
defined by TXVAL_SF1.
0 = SPDIFOP pin sources output of S/PDIF Transmitter
1 = SPDIFOP pins sources output of S/PDIF IN Mux
0 = High impedance, power saving
1 = Low impedance, fast power-on
00 = S/PDIF received data (see REAL_THROUGH)
01 = ADC digital output data.
10 = Secondary Audio Interface
11 = Audio Interface received data
DESCRIPTION
PD, Rev 4.7, March 2009
WM8580
89