wm8580a Wolfson Microelectronics plc, wm8580a Datasheet - Page 26

• Manufacturer Part Number: wm8580a
• Description: Multichannel Codec With S/pdif Transceiver
• Manufacturer: Wolfson Microelectronics plc

WM8580
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I
In I
transition. The MSB of the output data changes on the first falling edge of BCLK following an LRCLK
transition, and may be sampled on the next rising edge of BCLK. LRCLKs are low during the left
samples and high during the right samples.
Figure 16 I
DSP MODE A
In DSP Mode A, the MSB of Channel 1 left data is sampled on the second rising edge of BCLK
following a LRCLK rising edge. Channel 1 right data then follows. For the PAIF Receiver, Channels 2
and 3 follow as shown in Figure 17.
Figure 17 DSP Mode A Timing Diagram – PAIF Receiver Input Data
For the SAIF receiver, only stereo information is processed.
Figure 18 DSP Mode A Timing Diagram – SAIF Receiver Input Data
2
S MODE
2
S mode, the MSB of DIN1/2/3 is sampled on the second rising edge of BCLK following a LRCLK
2
S Mode Timing Diagram
PD, Rev 4.7, March 2009
Production Data
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