wm8775 Wolfson Microelectronics plc, wm8775 Datasheet - Page 22

• Manufacturer Part Number: wm8775
• Description: 24-bit, 96khz Adc With 4 Channel I/p Multiplexer
• Manufacturer: Wolfson Microelectronics plc

WM8775
w
The WL[1:0] bits are used to control the input word length.
Note:
When operating the ADC digital interface in slave mode, to optimise the performance of the ADC it is
recommended that the ADCMCLK and ADCBCLK input signals do not have coinciding rising edges.
The ADCMCLK bit provides the option to internally invert the ADCMCLK input signal when the input
signals have coinciding rising edges.
ADC MASTER MODE
Control bit MS selects between audio interface Master and Slave Modes. In Master mode ADCLRC
and BCLK are outputs and are generated by the WM8775. In Slave mode ADCLRC and BCLK are
inputs to WM8775.
By default, ADCLRC is sampled on the rising edge of BCLK and should ideally change on the falling
edge. Data sources that change ADCLRC on the rising edge of BCLK can be supported by setting
the BCP register bit. Setting BCP to 1 inverts the polarity of BCLK to the inverse of that shown in
Figures 12, 13, 14, and 15.
1.
2.
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
Interface Control
Interface Control
Interface Control
Interface Control
Interface Control
If 32-bit mode is selected in right justified mode, the WM8775 defaults to 24 bits.
In 24 bit I
minimum of 24 BCLKs and low for a minimum of 24 BCLKs.
R11(0Bh)
R11(0Bh)
R11(0Bh)
R11(0Bh)
R12(0Ch)
0001011
0001011
0001011
0001011
0001100
2
S mode, any width of 24 bits or less is supported provided that ADCLRC is high for a
BIT
BIT
BIT
5:4
BIT
BIT
2
3
6
8
ADCBCP
ADCMCLK
ADCLRP
ADCWL
ADCMS
LABEL
LABEL
LABEL
LABEL
LABEL
[1:0]
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
0
10
0
0
0
In left/right/ I
ADCLRC Polarity (normal)
In DSP mode:
BCLK Polarity (DSP modes)
Word Length
Audio Interface Master/Slave Mode
select:
ADCMCLK Polarity
0 : normal ADCLRC polarity
1: inverted ADCLRC polarity
0 : DSP mode A
1: DSP mode B
0 : normal BCLK polarity
1: inverted BCLK polarity
00 : 16 bit data
01: 20 bit data
10: 24 bit data
11: 32 bit data
0 : Slave Mode
1: Master Mode
0 : non-inverted
1: inverted
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
2
PD, Rev 4.4, October 2008
S modes:
Production Data
22