xr16v794iv Exar Corporation, xr16v794iv Datasheet - Page 9

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xr16v794iv

Manufacturer Part Number
xr16v794iv
Description
High Performance 2.25v To 3.6v Quad Uart With Fractional
Manufacturer
Exar Corporation
Datasheet

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REV. 1.0.0
The transmitter section comprises of an 8-bit Transmit Shift Register (TSR) and 64 bytes of FIFO which
includes a byte-wide Transmit Holding Register (THR). TSR shifts out every data bit with the 16X or 8X (if 8X
sampling is selected via the
transmitter sends the start-bit followed by the number of data bits, inserts the proper parity-bit if enabled, and
adds the stop-bit(s). The status of the FIFO and TSR are reported in the Line Status Register (LSR bit-5 and
bit-6).
2.7
Output Data
Required
1000000
100000
115200
153600
200000
225000
230400
250000
300000
400000
460800
500000
750000
921600
10000
19200
25000
28800
38400
50000
57600
75000
Rate
2400
4800
9600
400
Transmitter
T
ABLE
4: T
YPICAL DATA RATES WITH A
D
HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL BAUD RATE
16x Clock
(Decimal)
IVISOR FOR
52.0833
39.0625
26.0417
13.0208
156.25
78.125
9.7656
6.6667
6.5104
3.2552
1.6276
312.5
3750
3.75
625
150
7.5
1.5
60
30
20
15
6
5
3
2
8XMODE Register
O
BTAINABLE IN
312 8/16
156 4/16
78 2/16
52 1/16
39 1/16
26 1/16
D
9 12/16
6 11/16
3 12/16
1 10/16
7 8/16
6 8/16
3 4/16
1 8/16
3750
IVISOR
794
625
150
60
30
20
15
13
6
5
3
2
24 MH
DLM P
) internal clock. A bit time is 16 (or 8) clock periods. The
V
ALUE
Z CRYSTAL OR EXTERNAL CLOCK AT
9
ROGRAM
E
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(HEX)
DLL P
V
ALUE
A6
9C
4E
3C
1E
1A
71
38
96
34
27
14
D
ROGRAM
F
9
7
6
6
6
5
3
3
3
2
1
1
(HEX)
DLD P
V
ALUE
ROGRAM
C
B
C
A
16X S
0
0
8
4
0
2
0
1
1
0
1
0
0
0
8
8
0
0
4
0
0
8
(HEX))
AMPLING
XR16V794
D
ATA
R
ATE
0.04
0.08
0.16
0.16
0.31
0.16
0.16
0.16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
E
RROR
(%)

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