xr16v794iv Exar Corporation, xr16v794iv Datasheet - Page 27

• Manufacturer Part Number: xr16v794iv
• Description: High Performance 2.25v To 3.6v Quad Uart With Fractional
• Manufacturer: Exar Corporation

REV. 1.0.0
T
A
ABLE
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 1
0 0 1 0
0 0 0 1
0 0 1 0
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
A3-A0
DDRESS
12: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION.
TXCNT
FCTR
N
MCR
RHR
DLM
MSR
MSR
THR
DLD
FCR
LCR
LSR
SPR
EFR
R
DLL
IER
ISR
AME
EG
W
R
HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL BAUD RATE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
EAD
RITE
W
W
W
R
R
R
R
/
DSR# Int.
CTS/DSR
Prescaler
RX FIFO
RX FIFO
Enable
Enable
Trigger
Divisor
Enable
E
RS485
Enable
FIFOs
DLY-3
B
CTS/
Table
BRG
TRG
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Auto
Bit-7
RROR
Bit-1
CD
IT
0/
0/
0
-7
DTR# Int.
Transmit-
ter Empty
RTS/DTR
RX FIFO
Enable
Enable
Trigger
Enable
Enable
Set TX
RS485
FIFOs
DLY-2
Break
Table
B
RTS/
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
TRG
Auto
Bit-6
Bit-0
IR
RI
IT
0/
0/
0
-6
Set Parity Even Par-
Sp. Char.
Flow Cntl
Xon/Xoff/
TX FIFO
TX FIFO
XonAny
Special
Enable
Trigger
RS485
RS485
Enable
Empty
Select
Delta-
DLY-1
B
DSR
Char
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
Auto
Bit-5
Int.
IT
0/
0/
0/
0/
0
-5
27
Xoff/special
Loopback
RX Break
FCR[5:4],
IER [7:5],
ISR [5:4],
MCR[7:5,
MSR[7:2]
TX FIFO
RX Input
Invert IR
Internal
Trigger
Enable
RS485
Enable
DLY-0
B
Bit-4
Bit-4
Bit-4
Bit-4
char
CTS
Bit-4
Bit-4
3:2]
ity
IT
0/
0/
0
0
-4
Status Int.
RX Fram-
RTS/DTR
Hyst Bit-3
Flow Cntl
Software
ing Error
TX char
Immedi-
Modem
Disable
Source
Enable
Enable
(OP2)
Parity
Mode
B
Delta
DMA
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
CD#
Bit-3
Bit-3
Bit-3
INT
ate
TX
IT
-3
1
Status Int.
Hyst Bit-2
RTS/DTR
RX Parity
RTS/DTR
Flow Cntl
Stop Bits
Software
TX FIFO
Flow Sel
RX Line
Disable
Enable
Source
(OP1)
Reset
B
Delta
Error
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
INT
RI#
RX
IT
-2
S
1
HADED BITS ARE ENABLED BY
TX Ready
RTS# Pin
RTS/DTR
Hyst Bit-1
RX Over-
Flow Cntl
RX FIFO
Software
Source
Control
Enable
Length
Reset
DSR#
B
Word
Delta
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
INT
Int.
run
IT
-1
DTR# Pin
RTS/DTR
Hyst Bit-0
Flow Cntl
Software
RX Data
RX Data
Enable
Source
Enable
Control
Length
FIFOs
Ready
CTS#
B
Word
Delta
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
XR16V794
INT
Int.
IT
-0
EFR B
User Data
C
LCR[7]=0
LCR[7]=0
LCR[7]=1
LCR[7]=1
LCR[7]=1
LCR[7]=0
LCR[7]=0
LCR[7]=0
OMMENT
IT
-4.