xr16v794iv Exar Corporation, xr16v794iv Datasheet - Page 12

• Manufacturer Part Number: xr16v794iv
• Description: High Performance 2.25v To 3.6v Quad Uart With Fractional
• Manufacturer: Exar Corporation

XR16V794
HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL BAUD RATE
N
The THR and RHR register addresses for channel 0 to channel 7 are shown in
RHR for channels 0 to 7 are located at address 0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60 and 0x70
respectively. Transmit data byte is loaded to the THR when writing to that address and receive data is
unloaded from the RHR register when reading that address. Both THR and RHR registers are 16C550
compatible in 8-bit format, so each bus operation can only write or read in bytes..
F
2.9
OTE
IGURE
Receive Data
Byte and Errors
:
16X or 8X Clock
64 bytes by 11-bit
Table-B selected
8. R
THR and RHR Register Locations
FIFO
wide
T
ECEIVER
ABLE
CH0 0x00 Read RHR
CH0 0x00 Write THR
5: T
CH1 0x10 Write THR
CH2 0x20 Write THR
CH3 0x30 Write THR
CH1 0x10 Read RHR
CH2 0x20 Read RHR
CH3 0x30 Read RHR
as Trigger Table for
O
PERATION IN
RANSMIT AND
THR and RHR Address Locations For CH0 to CH3 (16C550 Compatible)
Receive Data Shift
Register (RSR)
Data FIFO
Figure 8
Receive
Receive
FIFO
Data
R
ECEIVE
AND
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
(see
H
A
OLDING
UTO
Validation
FIFO Trigger=16
Data fills to 24
Data Bit
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Data falls to 8
Table 14
Example:
RTS F
12
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
R
EGISTER
)
.
LOW
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Enable by EFR bit-6=1, MCR bit-1.
Enable by EFR bit-6=1, MCR bit-1.
- RX FIFO trigger level selected at 16 bytes
RTS# re-asserts when data falls below the flow
control trigger level to restart remote transmitter.
RTS# de-asserts when data fills above the flow
desired FIFO trigger level.
control trigger level to suspend remote transmitter.
FIFO is Enabled by FCR bit-0=1
C
RHR Interrupt (ISR bit-2) programmed for
ONTROL
L
OCATIONS
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
(See Note Below)
M
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
ODE
, 16C550
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Receive Data Characters
Table 5
784THRRHR1
COMPATIBLE
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
below. The THR and
RXFIFO1
REV. 1.0.0