73s1217f68im Maxim Integrated Products, Inc., 73s1217f68im Datasheet - Page 82

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73s1217f68im

Manufacturer Part Number
73s1217f68im
Description
Bus-powered 80515 System-on-chip With Usb, Iso 7816 / Emv, Pinpad And More
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.7.17.3
When a 12Mhz crystal is used, the smart card UART will generate a 3.69Mhz (default) clock to both
smart card interfaces. This will allow approximately 9600bps (1/ETU) communication during ATR (ISO
7816 default)
determine that the smart card parameters F and D may be changed. After this negotiation, the firmware
may change the ETU by writing to the SFR
change the smart card clock frequency by writing to the SFR
Independent clock frequency control is provided to each smart card interface. Clock stop high or Clock
stop low is supported in asynchronous mode.
firmware determines when clock stop is supported by the smart card and when it is appropriate to go into
that mode (and when to come out of it). The smart card UART is clocked by the same clock is provided
to the selected smart card. The transition between smart card clocks is handled in hardware to eliminate
any glitches for the UART during switchover. The external smart card clock is not affected when
switching the UART to communicate
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VCCSEL to 00
Firmware sets
t1: Time after either a “card event” occurs or firmware sets the VCCSela and VCCSelb bits to 0 (see
t2: Time after RST goes low until CLK stops.
t3: Time after CLK stops until IO goes low.
t4: Time after IO goes low until VCC is powered down.
t5: Delayed VCC off time (in ETUs per VCCOff_tmr bits). Only in effect due to firmware
deactivation.
Card Event
t5 delay or
CMDVCCnB
t5, VCCOff_tmr) occurs until RST is asserted low.
VCC
Data Reception/Transmission
CLK
RST
.
IO
As part of the PPS negotiation between the smart card and the reader, the firmware may
t5
Figure 19: Deactivation Sequence
with the internal smart card.
FDReg
t1
Figure 20
t2
to adjust the ETU and CLK. The firmware may also
t3
shows the ETU and CLK control circuits. The
SCCLK (SCECLK
t4
for external interface).
Rev. 1.2

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