73s1217f68im Maxim Integrated Products, Inc., 73s1217f68im Datasheet - Page 61

• Manufacturer Part Number: 73s1217f68im
• Description: Bus-powered 80515 System-on-chip With Usb, Iso 7816 / Emv, Pinpad And More
• Manufacturer: Maxim Integrated Products, Inc.

Figure 11 shows the timing of the I
1.7.13.2
To read data on the I
in this sequence:
1. Write slave device address to the Device Address register (DAR). The data contains 7 bits device
2. Write control data to the Control and Status register (CSR). Write a 1 to bit 1 to start I
3. Wait for I
4. Read data from the Read Data register (RDR).
5. Read data from Secondary Read Data register (SRDR) if bit 0 of Control and Status register (CSR) is
Rev. 1.2
address and 1 bit of op-code. The op-code bit should be written with a 1.
Also write a 1 to bit 0 if the Secondary Read Data register (SRDR) is to be captured from the I
Slave device.
Refer to information about the INT6Ctl,
written with a 1.
Transfer length
Transfer length
I2C_Interrupt
I2C_Interrupt
(CSR bit1)
(CSR bit0)
(CSR bit1)
Start I2C
(CSR bit0)
Start I2C
SDA
SCL
SDA
SCL
I
2
2
C interrupt to be asserted. It indicates that the read operation on the I
C Read Sequence
condition
condition
START
2
START
C Master Bus from a slave device, the 80515 has to program the following registers
MSB
MSB
Device Address
Device Address
1-7
1-7
Figure 11: I
[7:0]
2
[7:0]
C write mode.
LSB
LSB
8
8
IEN1
2
ACK bit
C Write Mode Operation
ACK bit
9
9
and
MSB
MSB
Write Data [7:0
Write Data [7:0]
IRCON
10-17
10-17
LSB
LSB
registers for masking and flag operation.
ACK bit
ACK bit
18
18
MSB
Secondary Write
condition
STOP
Data [7:0]
19-26
LSB
ACK bit
2
C bus is done.
27
2
condition
C Master Bus.
STOP
2
C
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