73s1217f68im Maxim Integrated Products, Inc., 73s1217f68im Datasheet - Page 29

• Manufacturer Part Number: 73s1217f68im
• Description: Bus-powered 80515 System-on-chip With Usb, Iso 7816 / Emv, Pinpad And More
• Manufacturer: Maxim Integrated Products, Inc.

When the PWRDN bit is set, the clock subsystem will provide a delay of 32 MPUCLK cycles to allow the
program to set the STOP bit in the PCON register. This delay will enable the program to properly halt the
core before the analog circuits shut down (high speed oscillator, VCO/PLL, voltage reference and bias
circuitry, etc.). The PDMUX bit in SFR INT5Ctl should be set prior to setting the PWRDN bit in order to
configure the wake up interrupt logic. The power down mode is de-asserted by any of the interrupts
connected to external interrupts 0, 4 and 5 (external USR[0:7], smart card and Keypad). These interrupt
sources are OR’ed together and routed through delay logic into INT0 to provide this functionality. The
interrupt will turn on the power to all sections that were shut off and start the clock subsystem. After the
clock subsystem clocks start running, the MPUCLK begins to clock a 512 count delay counter. When the
counter times out, the interrupt will then be active on INT0 and the program can resume. Figure 7 shows
the detailed logic for waking up the 73S1217F from a power down state using these specific interrupt
sources. Figure 8 shows the timing associated with the power down mode.
Rev. 1.2
Note: the PWRDN Signal is not the direct version of the PWRDN Bit. There are delays from assertion of the
PWRDN bit to the assertion of the PWRDN Signal (32 MPU clocks) Refer to the Power Down sequence diagram.
the names of the control bits.
These are the registers and
SCVCCCtl - SCPRDN
MCLCKCtl - HOSEN
VDDFCtl - VDDFEN
MCLCKCtl - 32KEN
MISCtl1 - ANAPEN
MISCtl1 - USBPEN
MISCtl0 - PWRDN
ACOMP - CMPEN
MISCtl1 - FRPEN
Figure 6: Power-Down Control
PWRDN Signal
SUSPEND
USB
+
+
+
+
+
+
+
PD_ANALOG
reference and bias
Smart Card Power
Analog functions
Flash Read Pulse
USB Transceiver
High Speed OSC
(suspend mode)
one-shot circuit
block references.
circuits, etc.)
These are the
(VCO, PLL,
VDDFAULT
COMPARE
ANALOG
32K OSC
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