km416s1120d ETC-unknow, km416s1120d Datasheet - Page 16

• Manufacturer Part Number: km416s1120d
• Description: 512k X 16bit X 2 Banks Synchronous Dram Lvttl
• Manufacturer: ETC-unknow

KM416S1120D
3. CAS Interrupt (I)
*Note : 1. By " Interrupt", It is meant to stop burst read/write by external command before the end of burst.
DQ(CL2)
DQ(CL3)
2) Write interrupted by Write (BL=2)
1) Read interrupted by Read (BL=4)
CMD
CMD
CLK
ADD
ADD
CLK
DQ
2. t
3. t
By "CAS Interrupt", to stop burst read/write by CAS access ; read and write.
CCD
CDL
: Last data in to new column address delay. (=1CLK)
: CAS to CAS delay. (=1CLK)
DA
WR
RD
A
A
tCCD
Note 2
tCCD
tCDL
Note 3
0
DB
WR
RD
B
B
0
Note 2
QA
DB
Note 1
0
1
QB
QA
0
0
QB
QB
1
0
QB
QB
2
1
DQ(CL2)
DQ(CL3)
QB
QB
3
2
3) Write interrupted by Read (BL=2)
QB
- 16
3
DA
DA
WR
A
tCCD
0
0
tCDL
Note 3
RD
B
Note 2
QB
0
QB
QB
0
1
QB
1
CMOS SDRAM
Rev. 1.4 (Jun. 1999)