z8e001 ZiLOG Semiconductor, z8e001 Datasheet - Page 41

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z8e001

Manufacturer Part Number
z8e001
Description
Feature-rich Z8plus One-time Programmable Otp Microcontroller
Manufacturer
ZiLOG Semiconductor
Datasheet

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ZiLOG
I/O PORT RESET CONDITIONS
Full Reset
Port A and Port B output value registers are not affected by
RESET.
On RESET, the Port A and Port B directional control reg-
isters is cleared to all zeros, which defines all pins in both
ports as inputs.
On RESET, the directional control registers redefine all
pins as inputs, and the Port A and Port B input value registers
ANALOG COMPARATOR
The Z8E001 includes one on-chip analog comparator. Pin
PB4 has a comparator front end. The comparator reference
voltage is on pin PB3.
Comparator Description
The on-chip comparator can process an analog signal on
PB4 with reference to the voltage on PB3. The analog func-
tion is enabled by programming the Port B Special Function
Register bits 3 and 4.
COMPARATOR OPERATION
The comparator output reflects the relationship between the
analog input to the reference input. If the voltage on the an-
alog input is higher than the voltage on the reference input,
then the comparator output is at a High state. If the voltage
on the analog input is lower than the voltage on the reference
input, then the analog output will be at a Low state.
Comparator Definitions
V ICR
The usable voltage range for the positive input and reference
input is called the common mode voltage range (V
Note: The comparator is not guaranteed to work if the input is
DS001101-Z8X0400
outside of the V ICR range.
P R E L I M I N A R Y
ICR
).
overwrites the previously held data with the current sample
of the input pins.
On RESET, the Port A and Port B special function registers
is cleared to all zeros, which deactivates all port special
functions.
Note: The SMR and WDT timeout events are NOT full device
When the analog comparator function is enabled, bit 4 of
the input register is defined as holding the synchronized out-
put of the comparator, while bit 3 retains a synchronized
sample of the reference input.
If the interrupts for PB4 are enabled when the comparator
special function is selected, the output of the comparator
generates interrupts.
V OFFSET
The absolute value of the voltage between the positive input
and the reference input required to make the comparator
output voltage switch is the input offset voltage (V
I IO
For the CMOS voltage comparator input, the input offset
current (I
HALT Mode
The analog comparator is functional during HALT Mode.
If the interrupts are enabled, an interrupt generated by the
comparator will cause a return from HALT Mode.
STOP Mode
The analog comparator is disabled during STOP Mode. The
comparator is powered down to prevent it from drawing any
current.
resets. The port control registers are not affected by ei-
ther of these events.
IO
) is the leakage current of the CMOS input gate.
Z8Plus OTP Microcontroller
OFFSET
Z8E001
41
).

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