z8e001 ZiLOG Semiconductor, z8e001 Datasheet
z8e001
Available stocks
Related parts for z8e001
z8e001 Summary of contents
Page 1
... DIP, SOIC, and 20-Pin SSOP Packages. For applications demanding powerful I/O capabilities, the Z8E001Õs dedicated input and output lines are grouped into two ports, and are configurable under software control. Both 8-bit and 16-bit on-chip timers, with a large number ...
Page 2
... Z8E001 Z8Plus OTP Microcontroller GENERAL DESCRIPTION (Continued) ing real-time tasks such as counting/timing and I/O data communications. Note: All signals with an overline, Ò Ó, are active Low. For W example, B/ (WORD is active Low, only); (BYTE is active Low, only). Two 8-bit Timers or One 16-bit PWM ...
Page 3
... ZiLOG AD9Ð0 Z8E001 MCU AD9Ð0 ADDRESS GENERATOR PGM + TEST MODE LOGIC PGM ADCLK XTAL1 Figure 2. EPROM Programming Mode Block Diagram DS001101-Z8X0400 D7Ð0 AD9Ð0 ADDRESS MUX EPROM ROM PROT OPTION BIT ADCLR Z8Plus OTP Microcontroller ...
Page 4
... Z8E001 Z8Plus OTP Microcontroller PIN DESCRIPTION Figure 3. 18-Pin DIP/SOIC Pin Identification/EPROM Programming Mode EPROM Programming Mode Pin # Symbol PGM 1 2Ð4 GND 5 ADCLR/V PP 6-9 D7ÐD4 10Ð13 D3Ð GND XTAL1 18 ADCLK 4 1 PGM GND GND GND 18-Pin DIP ADCLR/V ...
Page 5
... Port A, Pins 7,6,5,4 Port A, Pins 3,2,1,0 Power Supply Ground Crystal Osc. Clock Crystal Osc. Clock Port B, Pin Z8Plus OTP Microcontroller PBO XTAL1 XTAL2 PA0 PA1 PA2 PA3 Direction Input/Output Input Input/Output Input/Output Output Input Input/Output Z8E001 5 ...
Page 6
... Z8E001 Z8Plus OTP Microcontroller PIN DESCRIPTION (Continued) Standard Mode Pin # Symbol 1Ð4 PB1ÐPB4 5 RESET 6 NC 7Ð10 PA7ÐPA4 11Ð14 PA3ÐPA0 XTAL2 19 XTAL1 20 PB0 6 1 PB1 20 PB2 PB3 PB4 RESET SSOP 20-Pin NC PA7 PA6 PA5 10 11 PA4 Figure 5 ...
Page 7
... Prog Mode Ground Clear Clk./Prog Volt. No Connection Data 7,6,5,4 Data 3,2,1,0 No Connection Power Supply Ground No Connection 1MHz Clock Address Clock Z8Plus OTP Microcontroller 20 ADCLK XTAL1 NC GND Direction Input Input Input/Output Input/Output Input Input Z8E001 7 ...
Page 8
... Z8E001 Z8Plus OTP Microcontroller ABSOLUTE MAXIMUM RATINGS Parameter Ambient Temperature under Bias Storage Temperature Voltage on any Pin with Respect Voltage Pin with Respect Voltage on RESET Pin with Respect Total Power Dissipation Maximum Allowable Current out Maximum Allowable Current into V DD ...
Page 9
... V = GND = 0V 1.0 MHz, unmeasured pins returned to GND Parameter Input capacitance Output capacitance I/O capacitance DS001101-Z8X0400 From Output Under Test Min Max Z8Plus OTP Microcontroller Figure 7. Test Load Diagram Z8E001 150 pF 9 ...
Page 10
... Z8E001 Z8Plus OTP Microcontroller DC ELECTRICAL CHARACTERISTICS Sym Parameter V Clock Input High CH Voltage V Clock Input Low CL Voltage V Input High Voltage IH V Input Low Voltage IL V Output High Voltage OH V Output Low Voltage OL1 V Output Low Voltage OL2 V Reset Input High RH Voltage V Reset Input Low ...
Page 11
... level Z8Plus OTP Microcontroller 2 Typical @ 25¡C Units Conditions 2 MHz 3 MHz 1.0 mA HALT Mode MHz CC 2.5 mA HALT Mode MHz CC 150 nA STOP Mode Z8E001 Notes 4,5 4,5 = 0V, 4,5 = 0V, 4 ...
Page 12
... Z8E001 Z8Plus OTP Microcontroller DC ELECTRICAL CHARACTERISTICS (Continued) Sym Parameter V Clock Input High CH Voltage V Clock Input Low CL Voltage V Input High Voltage IH V Input Low Voltage IL V Output High Voltage OH V Output Low Voltage OL1 V Output Low Voltage OL2 V Reset Input High RH Voltage ...
Page 13
... Z8Plus OTP Microcontroller 2 Typical @ 25¡C Units Conditions 4 MHz 4 MHz 1.0 mA HALT Mode MHz CC 1.0 mA HALT Mode MHz CC 250 nA STOP Mode 0V,V CC 250 nA STOP Mode 0V,V CC Z8E001 Notes 4,5 4,5 = 0V, 4,5 = 0V, 4 ...
Page 14
... Z8E001 Z8Plus OTP Microcontroller AC ELECTRICAL CHARACTERISTICS CLOCK IRQ No Symbol Parameter 1 TpC Input Clock Period 2 TrC,TfC Clock Input Rise and Fall Times 3 TwC Input Clock Width 4 TwIL Int. Request Input Low Time 5 TwIH Int. Request Input High Time 6 Twsm STOP Mode Recovery Width Spec ...
Page 15
... Reset Pin, Watch-Dog Timer (WDT), and Stop-Mode Recovery (SMR). A system reset overrides all other operating conditions and puts the Z8E001 into a known state. To initialize the chipÕs internal logic, the RESET input must be held Low for at least 30 XTAL clock cycles. The control registers and ports ...
Page 16
... Z8E001 Z8Plus OTP Microcontroller RESET PIN OPERATION (Continued) Table 4. Control and Peripheral Registers (Continued) Register (HEX) Register Name D7 Port B Special Function D6 Port B Directional Control D5 Port B Output D4 Port B Input D3 Port A Special Function D2 Port A Directional Control D1 Port A Output D0 Port A Input CF Reserved CE Reserved CD T1VAL ...
Page 17
... Periods (Minimum) Figure 10. Example of External Power-On Reset (POR) Circuit DS001101-Z8X0400 10 XTAL CLOCK CYCLES Figure 9. Reset Timing 100 K½ 500 K½ RESET 1K½ 1 µF Z8E001 Z8E001 Z8Plus OTP Microcontroller First Machine Cycle First Instruction Fetch 17 ...
Page 18
... Z8E001 Z8Plus OTP Microcontroller RESET PIN OPERATION (Continued) TCTLHI D6,D5,D4 XTAL SMR (PB0) Figure 11. Z8E001 Reset Circuitry with WDT and SMR 18 3 WDT TAP SELECT WDTRST /64 16-BIT TIMER WATCHDOG TIMER SMR LOGIC ZiLOG WDTRST SMR RECOVERY DS001101-Z8X0400 ...
Page 19
... ZiLOG Z8E001 WATCH-DOG TIMER (WDT) The WDT is a retriggerable one-shot 16-bit timer that resets the Z8E001 if it reaches its terminal count. The WDT is driv the XTAL2 clock pin. To provide the longer timeout periods required in applications, the watchdog timer is only updated every 64th clock cycle. When operating in the RUN ...
Page 20
... Note: The WDT can only be disabled via software if the first instruction out of RESET performs this function. Logic within the Z8E001 detects that the process of ex- ecuting the first instruction after the part leaves RESET. During the execution of this instruction, the upper five bits of the TCTLHI register can be written ...
Page 21
... The STOP Mode provides the lowest possible device stand- by current. This instruction turns off the on-chip oscillator and internal system clock. To enter the STOP Mode, the Z8E001 only requires a STOP instruction NOT necessary to execute a NOP instruc- tion immediately before the STOP instruction. ...
Page 22
... Circuit Board Design Rules The following circuit board design rules are suggested: ¥ To prevent induced noise, the crystal and load capacitors should be physically located as close to the Z8E001 as possible. ¥ Signal lines should not run parallel to the clock oscillator inputs. In particular, the crystal input circuitry and the in- ternal system clock output should be separated as much as possible ...
Page 23
... Depending on the operation frequency, the oscillator can re- quire additional capacitors, C1 and C2, as shown in Figure 16 and Figure 17. The capacitance values are dependent on the manufacturerÕs crystal specifications Z8Plus OTP Microcontroller Z8E001 PB0 Board Design Example (Top View) Z8E001 23 ...
Page 24
... V (GND) pin of the Z8E001. This requirement assures that system noise is injected into the Z8E001 clock. This trace should not be shared with any other components except at the V SS Note: A parallel resonant crystal or resonator data sheet speci- is infinite ...
Page 25
... ZiLOG LC OSCILLATOR The Z8E001 oscillator can use a LC network to generate a XTAL clock (Figure 17). The frequency stays stable over V CC oscillation frequency is determined by the equation: Frequency = 2 where L is the total inductance including parasitics, and C is the total series capacitance including parasitics. Simple series capacitance is calculated using the equation at the top of the next column ...
Page 26
... Z8E001 Z8Plus OTP Microcontroller TIMERS (Continued) T1ARHI OSC/8 26 Internal Data Bus T1ARHI T1ARLO T1VAL (Not used 8-bit in this mode) Down Counter 8-bit (Not used Down in this mode) Counter T0ARHI T0ARLO T0VAL Internal Data Bus Figure 20. 8-Bit Standard Timers Internal Data Bus ...
Page 27
... Whether initialization is done with the new or old value is a function of the exact timing of the write operation. In all cases, the Z8E001 prioritizes the software write above that of a decrementer writeback; however, when hardware clears a control register bit for a timer that is configured for single-shot operation, the clearing of the control bit over- rides a software write ...
Page 28
... Z8E001 Z8Plus OTP Microcontroller TIMERS (Continued) at any time, and will have no effect on the functionality of the timer timer pair is defined to operate as a single 16-bit entity, the entire 16-bit value must reach 0 before an interrupt is generated. In this case, a single interrupt is generated, and the interrupt corresponds to the even 8-bit timer. ...
Page 29
... DISABLED DISABLED 0 1 ENABLED DISABLED 1 0 DISABLED ENABLED 1 1 ENABLED ENABLED BIT 3: COMP. REF. INPUT BIT 4: COMP. SIGNAL INPUT/ INT0/INT2 RESERVED (MUST BE 0) Operation) out 1 = BIT N SET AS OUTPUT 0 = BIT N SET AS INPUT RESERVED (MUST BE 0) PB1 T OUT OUT Z8E001 29 ...
Page 30
... Each port on the Z8E001 has a dedicated Directional Con- trol Register that determines (on a bit-wise basis) whether a given port bit operates as either an input or an output. Each port on the Z8E001 has a Special Function Register that, in conjunction with the Directional Control Register, implements (on a bit-wise basis), any special functionality that can be defined for each particular port bit ...
Page 31
... Register 0D2H PTADIR Register Figure 26. Port A Directional Control Register Z8E001 Z8Plus OTP Microcontroller 1 = Output 0 = Input PA0ÐPA7 PIN 31 ...
Page 32
... Z8E001 Z8Plus OTP Microcontroller PORT A REGISTER DIAGRAMS Register 0D0H Register 0D1H PTAIN Figure 28. Port A Input Value Register PTAOUT Figure 29. Port A Output Value Register PORT A BIT N CURRENT INPUT VALUE (only updated for pins in ...
Page 33
... PTADIR Figure 30. Port A Directional Control Register PTASFR Figure 31. Port A Special Function Register Z8Plus OTP Microcontroller 1 = BIT N SET AS AN OUTPUT 0 = BIT N SET AS AN INPUT 1 = BIT N IN OPEN-DRAIN MODE 0 = BIT N IN PUSH-PULL MODE Z8E001 33 ...
Page 34
... Z8E001 Z8Plus OTP Microcontroller PORT B Port B Description Port 5-bit (bidirectional), CMOS-compatible I/O port. These five I/O lines can be configured under software con- trol input or output, independently. Input buffers are Schmitt-triggered. See Figure 33 through Figure 36 for diagrams of all five Port B pins. In addition to standard input/output capability on all five ...
Page 35
... ZiLOG PORT BÑPIN 0 CONFIGURATION PTBIN.bit0 SMR RESET PTBDIR.bit0 PTBOUT.bit0 DS001101-Z8X0400 PTBDIR.bit0 PTBSFR.bit0 SMR Flag Figure 33. Port B Pin 0 Diagram Z8E001 Z8Plus OTP Microcontroller PB0 PIN 35 ...
Page 36
... Z8E001 Z8Plus OTP Microcontroller PORT BÑPIN 1 CONFIGURATION PTBIN.bit1 PTBDIR.bit1 PTBOUT.bit1 M U TIMER0 X Output PTBSFR.bit1 36 PTBDIR.bit1 Figure 34. Port B Pin 1 Diagram ZiLOG PB1 PIN DS001101-Z8X0400 ...
Page 37
... ZiLOG PORT BÑPIN 2 CONFIGURATION PTBIN.bit2 IRQ3 PTBDIR.bit2 PTBOUT.bit2 DS001101-Z8X0400 PTBDIR.bit2 EDGE DETECT LOGIC PTBSFR.bit2 Figure 35. Port B Pin 2 Diagram Z8E001 Z8Plus OTP Microcontroller PB2 PIN 37 ...
Page 38
... Z8E001 Z8Plus OTP Microcontroller PORT BÑPINS 3 AND 4 CONFIGURATION PTBIN.bit4 IRQ1 EDGE DETECT LOGIC IRQ4 PTBSFR.bit4 PTBIN.bit3 PTBDIR.bit3 PTBOUT.bit3 PTBDIR.bit4 PTBOUT.bit4 38 PTBDIR.bit4 PTBSFR.bit3 PTBDIR.bit3 Figure 36. Port B Pins 3 and 4 Diagram ZiLOG REF PB3 PIN PB4 PIN ...
Page 39
... Z8Plus OTP Microcontroller PORT B BIT N CURRENT INPUT VALUE (only updated for pins in input mode) RESERVED (MUST PORT B BIT N CURRENT OUTPUT VALUE RESERVED (MUST BIT N SET AS OUTPUT 0 = BIT N SET AS INPUT RESERVED (MUST BE 0) Z8E001 39 ...
Page 40
... Z8E001 Z8Plus OTP Microcontroller PORT B CONTROL REGISTERS (Continued) Register 0D7H PTBSFR Figure 40. Port B Special Function Register ENABLE PB0 AS SMR INPUT SPECIAL FUNCTIONALITY 1 = ENABLE PB1 AS TIMER0 OUTPUT SPECIAL FUNCTIONALITY 1 = ENABLE PB2 AS IRQ3 INPUT SPECIAL FUNCTIONALITY 1 = Analog Comparator on PB3 & ...
Page 41
... On RESET, the directional control registers redefine all pins as inputs, and the Port A and Port B input value registers ANALOG COMPARATOR The Z8E001 includes one on-chip analog comparator. Pin PB4 has a comparator front end. The comparator reference voltage is on pin PB3. Comparator Description The on-chip comparator can process an analog signal on PB4 with reference to the voltage on PB3 ...
Page 42
... V CC PIN V SS Figure 41. I/O Pin Diode Input Protection 42 However, on the Z8E001, the RESET pin has only the input and V (Figure protection diode from pad Figure 42. RESET Pin Input Protection The high-side input protection diode was removed on this pin to allow the application of high voltage during the OTP programming mode ...
Page 43
... ZiLOG PACKAGE INFORMATION DS001101-Z8X0400 Figure 43. 18-Pin DIP Package Diagram Figure 44. 18-Pin SOIC Package Diagram Z8E001 Z8Plus OTP Microcontroller 43 ...
Page 44
... Z8E001 Z8Plus OTP Microcontroller PACKAGE INFORMATION (Continued) 44 Figure 45. 20-Pin SSOP Package Diagram ZiLOG DS001101-Z8X0400 ...
Page 45
... Z8E00110HSC 20-Pin SSOP Z8E00110PSC Extended Temperature 18-Pin DIP Z8E00110PEC 18-Pin SOIC Z8E00110SEC 20-Pin SSOP Z8E00110HEC For fast results, contact your local ZiLOG sales office for assistance in ordering the part(s) required. Codes Preferred Package P = Plastic DIP Longer Lead Time S = SOIC H = SSOP Preferred Temperature S = 0¡C to +70¡ Ð ...
Page 46
... Z8E001 Z8Plus OTP Microcontroller Pre-Characterization Product: The product represented by this document is newly introduced and ZiLOG has not completed the full characterization of the product. The document states what ZiLOG knows about this product at this time, but additional features or non-conformance Development Projects: Customer is cautioned that while reasonable efforts will be employed to meet performance objectives and milestone dates, development is subject to unanticipated problems and delays ...