r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 644

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
30.2.5
Notes:
After Reset
1. The VW1C0 is enabled when the VCA26 bit in the VCA2 register is set to 1 (comparator A1 circuit enabled).
2. When using the digital filter (while the VW1C1 bit is 0), set the CM14 bit in the CM1 register to 0 (low-speed on-
3. Bits VW1C2 and VW1C3 are enabled when the VCA26 bit in the VCA2 register is set to 1 (comparator A1 circuit
4. Set the VW1C2 bit to 0 by a program. When 0 is written by a program, this bit is set to 0 (and remains unchanged
5. The VW1C7 bit is enabled when the VCAC1 bit in the VCAC register is set to 0 (one edge). After setting the
6. When the VW1C0 bit is set to 1 (enabled), do not set the VW1C1 bit and bits VW1F1 and VW1F0 simultaneously
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0039h
Symbol VW1C7
Set the VW1C0 bit to 0 (disabled) when the VCA26 bit is set to 0 (comparator A1 circuit disabled). To set the
VW1C0 bit to 1 (enabled), follow the procedure shown in Table 30.3 Procedure for Setting Bits Associated
with Comparator A1 Interrupt .
chip oscillator on).
To use the comparator A1 interrupt to exit stop mode, set the VW1C1 bit in the VW1C register to 1 (digital filter
disabled).
enabled).
even if 1 is written to it).
VCAC1 bit to 0, set the VW1C7 bit.
(with one instruction).
Set the PRC3 bit in the PRCR register to 1 (write enabled) before rewriting the VW1C register.
Rewriting the VW1C register may set the VW1C2 bit to 1. After rewriting this register, set the VW1C2 bit to 0.
Bit
VW1C0 Comparator A1 interrupt enable bit
VW1C1 Comparator A1 digital filter
VW1C2 Comparator A1 interrupt flag
VW1C3 Comparator A1 signal monitor flag
VW1C7 Comparator A1 interrupt
Symbol
VW1F0 Sampling clock select bit
VW1F1
Voltage Monitor 1 Circuit Control Register (VW1C)
—
b7
1
disable mode select bit
Reserved bit
generation condition select bit
b6
—
0
Bit Name
VW1F1
b5
0
(2, 6)
(6)
VW1F0
b4
(3, 4)
0
(5)
(3)
(1)
VW1C3
0: Disabled
1: Enabled
0: Digital filter enable mode
1: Digital filter disable mode
[Condition to set this bit to 0]
[Condition to set this bit to 1]
0: LVCMP1
1: LVCMP1
b5 b4
Set to 0.
0: When LVCMP1 reaches reference voltage
1: When LVCMP1 reaches reference voltage
0 is written.
When an interrupt request is generated.
0 0: fOCO-S divided by 1
0 1: fOCO-S divided by 2
1 0: fOCO-S divided by 4
1 1: fOCO-S divided by 8
b3
1
(digital filter circuit enabled)
(digital filter circuit disabled)
or comparator A1 circuit disabled
or above.
or below.
VW1C2
b2
<
≥
0
reference voltage
reference voltage
VW1C1
Function
b1
1
VW1C0
b0
0
30. Comparator A
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R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R