r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 552

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
Figure 25.10
25.5.1
Figure 25.10 shows Initialization in 4-Wire Bus Communication Mode. Before the data transmit/receive
operation, set the TE bit in the SSER register to 0 (transmit disabled), the RE bit in the SSER register to 0
(receive disabled), and initialize the synchronous serial communication unit.
To change the communication mode or format, set the TE bit to 0 and the RE bit to 0 before making the change.
Setting the RE bit to 0 does not change the settings of flags RDRF and ORER or the contents of the SSRDR
register.
(1)
(2)
Initialization in 4-Wire Bus Communication Mode
Note:
Initialization in 4-Wire Bus Communication Mode
SSER register
1. Write 0 after reading 1 to set the ORER bit to 0.
SSMR register
SSCRH register
SSMR2 register
SSSR register
SSMR2 register
SSCRH register
SSER register
Set bits CPHS and CPOS
MLS bit ← 0
RE bit ← 1 (receive)
TE bit ← 1 (transmit)
Set bits RIE, TEIE, and TIE
Start
Set bits CKS0 to CKS2
Set RSSTP bit
End
SCKS bit ← 1
Set bits SOOS, CSS0 to
CSS1, and BIDE
ORER bit ← 0
SSUMS bit ← 1
RE bit ← 0
TE bit ← 0
Set MSS bit
(1)
25. Synchronous Serial Communication Unit (SSU)
(2) Set the BIDE bit to 1 in bidirectional mode and
(1) The MLS bit is set to 0 for MSB-first transfer.
set the I/O of the SCS pin by bits CSS0 and
CSS1.
The clock polarity and phase are set by bits
CPHS and CPOS.
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