r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 544

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
25.4
Figure 25.4
25.4.1
Figure 25.4 shows Initialization in Clock Synchronous Communication Mode. To initialize, set the TE bit in the
SSER register to 0 (transmit disabled) and the RE bit to 0 (receive disabled) before data transmission or
reception.
Set the TE bit to 0 and the RE bit to 0 before changing the communication mode or format.
Setting the RE bit to 0 does not change the contents of flags RDRF and ORER or the contents of the SSRDR
register.
Clock Synchronous Communication Mode
Initialization in Clock Synchronous Communication Mode
Initialization in Clock Synchronous Communication Mode
Note:
SSER register
SSCRH register
1. Write 0 after reading 1 to set the ORER bit to 0.
SSMR2 register
SSMR register
SSMR2 register
SSSR register
SSCRH register
SSER register
Set bits CKS0 to CKS2
Set RSSTP bit
RE bit ← 1 (receive)
TE bit ← 1 (transmit)
Set bits RIE, TEIE, and TIE
Start
End
SCKS bit ← 1
Set SOOS bit
CPHS bit ← 0
CPOS bit ← 0
Set MLS bit
ORER bit ← 0
SSUMS bit ← 0
Set MSS bit
RE bit ← 0
TE bit ← 0
25. Synchronous Serial Communication Unit (SSU)
(1)
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