mc56f801 Freescale Semiconductor, Inc, mc56f801 Datasheet - Page 69

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mc56f801

Manufacturer Part Number
mc56f801
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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6.3.7.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.3.7.2
6.3.7.3
6.3.7.4
6.3.7.5
6.3.7.6
6.3.7.7
Selects clock to be muxed out on the CLKO pin.
Freescale Semiconductor
Preliminary
Base + $A
RESET
0 = Peripheral output function of GPIOA[3] is defined to be PWM3
1 = Peripheral output function of GPIOA[3] is defined to be the Relaxation Oscillator Clock
0 = Peripheral output function of GPIOA[2] is defined to be PWM2
1 = Peripheral output function of GPIOA[2] is defined to be the system clock
0 = Peripheral output function of GPIOA[1] is defined to be PWM1
1 = Peripheral output function of GPIOA[1] is defined to be two times the rate of the system clock
0 = Peripheral output function of GPIOA[0] is defined to be PWM0
1 = Peripheral output function of GPIOA[0] is defined to be three times the rate of the system clock
0 = CLKOUT output is enabled and will output the signal indicated by CLKOSEL
1 = CLKOUT is 0
00000 = Reserved for factory test—Continuous system clock
01001 = Reserved for factory test—OCCS MSTR OSC clock
01011 = Reserved for factory test—ADC clock
01100 = Reserved for factory test—JTAG TCLK
01101 = Reserved for factory test—Continuous peripheral clock
01110 = Reserved for factory test—Continuous inverted peripheral clock
01111 = Reserved for factory test—Continuous high-speed peripheral clock
Read
Write
Reserved—Bits 15–10
PWM3—Bit 9
PWM2—Bit 8
PWM1—Bit 7
PWM0—Bit 6
Clockout Disable (CLKDIS)—Bit 5
Clockout Select (CLKOSEL)—Bits 4–0
15
0
0
14
0
0
Figure 6-8 CLKO Select Register (SIM_CLKOUT)
13
0
0
12
0
0
56F8014 Technical Data, Rev. 9
11
0
0
10
0
0
PWM
9
3
0
PWM
8
2
0
PWM1 PWM0
7
0
6
0
CLK
DIS
5
1
4
0
3
0
CLKOSEL
2
0
Register Descriptions
1
0
0
0
69

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