mc56f801 Freescale Semiconductor, Inc, mc56f801 Datasheet - Page 111

• Manufacturer Part Number: mc56f801
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

A, the internal [static component], is comprised of the DC bias currents for the oscillator, leakage currents,
PLL, and voltage references. These sources operate independently of processor state or operating
frequency.
B, the internal [state-dependent component], reflects the supply current required by certain on-chip
resources only when those resources are in use. These include RAM, Flash memory and the ADCs.
C, the internal [dynamic component], is classic C*V
56800E core and standard cell logic.
D, the external [dynamic component], reflects power dissipated on-chip as a result of capacitive loading
on the external pins of the chip. This is also commonly described as C*V
of the I/O cell types used on the 56800E reveal that the power-versus-load curve does have a non-zero
Y-intercept.
Power due to capacitive loading on output pins is (first order) a function of the capacitive load and
frequency at which the outputs change.
in the I/O cells as a function of capacitive load. In these cases:
where:
Because of the low duty cycle on most device pins, power dissipation due to capacitive loads was found
to be fairly low when averaged over a period of time.
E, the external [static component], reflects the effects of placing resistive loads on the outputs of the
device. Sum the total of all V
for the purposes of these rough calculations. For instance, if there is a total of eight PWM outputs driving
10mA into LEDs, then P = 8*.5*.01 = 40mW.
In previous discussions, power consumption due to parasitics associated with pure input pins is ignored,
as it is assumed to be negligible.
Freescale Semiconductor
Preliminary
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Summation is performed over all output pins with capacitive loads
TotalPower is expressed in mW
Cload is expressed in pF
TotalPower = Σ((Intercept + Slope*Cload)*frequency/10MHz)
Table 10-20 I/O Loading Coefficients at 10MHz
8mA drive
4mA drive
2
/R or IV to arrive at the resistive load contribution to power. Assume V = 0.5
56F8014 Technical Data, Rev. 9
Table 10-20
provides coefficients for calculating power dissipated
2
Intercept
1.15mW
*F CMOS power dissipation corresponding to the
1.3
0.11mW / pF
0.11mW / pF
Slope
2
*F, although simulations on two
Power Consumption
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