at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 447

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at91sam9g20-cu

Manufacturer Part Number
at91sam9g20-cu
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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T
31.10.5
Name:
Access:
Reset Value: 0x00000000
TWI_CWGR is only used in Master mode.
• CLDIV: Clock Low Divider
The SCL low period is defined as follows:
• CHDIV: Clock High Divider
The SCL high period is defined as follows:
• CKDIV: Clock Divider
The CKDIV is used to increase both SCL high and low periods.
6384B–ATARM–15-Dec-08
T
low
high
=
=
31
23
15
(
7
(
(
CLDIV
(
CHDIV
TWI Clock Waveform Generator Register
TWI_CWGR
Read-write
×
×
2
CKDIV
2
CKDIV
30
22
14
6
)
+
)
+
4 )
4 )
×
×
T
MCK
T
MCK
29
21
13
5
28
20
12
4
CHDIV
CLDIV
27
19
11
3
AT91SAM9G20 Preliminary
26
18
10
2
CKDIV
25
17
9
1
24
16
8
0
447

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