at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 12

• Manufacturer Part Number: at91sam9g20-cu
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

6. I/O Line Considerations
6.1
6.2
6.3
6.4
6.5
6.6
6384B–ATARM–15-Dec-08
JTAG Port Pins
Test Pin
Reset Pins
PIO Controllers
I/O Line Drive Levels
Shutdown Logic Pins
At reset, the selected slew rates defaults are Fast.
TMS, TDI and TCK are schmitt trigger inputs and have no pull-up resistors.
TDO and RTCK are outputs, driven at up to VDDIOP, and have no pull-up resistor.
The JTAGSEL pin is used to select the JTAG boundary scan when asserted at a high level. It
integrates a permanent pull-down resistor of about 15 kΩ to GND, so that it can be left uncon-
nected for normal operations.
The NTRST signal is described in the Reset Pins paragraph.
All the JTAG signals are supplied with VDDIOP.
The TST pin is used for manufacturing test purposes when asserted high. It integrates a perma-
nent pull-down resistor of about 15 kΩ to GNDBU, so that it can be left unconnected for normal
operations. Driving this line at a high level leads to unpredictable results.
This pin is supplied with VDDBU.
NRST is an open-drain output integrating a non-programmable pull-up resistor. It can be driven
with voltage at up to VDDIOP.
NTRST is an input which allows reset of the JTAG Test Access port. It has no action on the
processor.
As the product integrates power-on reset cells, which manages the processor and the JTAG
reset, the NRST and NTRST pins can be left unconnected.
The NRST and NTRST pins both integrate a permanent pull-up resistor of 100 kΩ minimum to
VDDIOP.
The NRST signal is inserted in the Boundary Scan.
All the I/O lines are Schmitt trigger inputs and all the lines managed by the PIO Controllers inte-
grate a programmable pull-up resistor of 75 kΩ typical with the exception of P4 - P31. For details,
refer to the section “AT91SAM9G20 Electrical Characteristics”. Programming of this pull-up
resistor is performed independently for each I/O line through the PIO Controllers.
The PIO lines drive current capability is described in the DC Characteristics section of the prod-
uct datasheet.
The SHDN pin is a tri-state output only pin, which is driven by the Shutdown Controller. There is
no internal pull-up. An external pull-up to VDDBU is needed and its value must be higher than 1
AT91SAM9G20 Preliminary
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