at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 209
at91sam9g20-cu
Manufacturer Part Number
at91sam9g20-cu
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9G20-CU.pdf
(814 pages)
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22.5.5.2
Figure 22-7. Low-power Mode Behavior
6384B–ATARM–15-Dec-08
SDRAMC_A[12:0]
SDCKE
D[31:0]
SDCS
SDCK
(input)
RAS
CAS
Low-power Mode
This mode is selected by programming the LPCB field to 2 in the SDRAMC Low Power Register.
Power consumption is greater than in self-refresh mode. All the input and output buffers of the
SDRAM device are deactivated except SDCKE, which remains low. In contrast to self-refresh
mode, the SDRAM device cannot remain in low-power mode longer than the refresh period (64
ms for a whole device refresh operation). As no auto-refresh operations are performed by the
SDRAM itself, the SDRAM Controller carries out the refresh operation. The exit procedure is
faster than in self-refresh mode.
This is described in
Row n
T
RCD
= 3
col a
Figure
CAS = 2
22-7.
col b
Dna
col c
Dnb
col d
AT91SAM9G20 Preliminary
Dnc
col e
Dnd
col f
Dne
Dnf
Low Power Mode
209
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