dspic33fj16gs404t-i-pt Microchip Technology Inc., dspic33fj16gs404t-i-pt Datasheet - Page 259

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dspic33fj16gs404t-i-pt

Manufacturer Part Number
dspic33fj16gs404t-i-pt
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
REGISTER 19-8:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
Note 1: This register is only implemented on the dsPIC33FJ16GS502 and dsPIC33FJ16GS504 devices.
IRQEN6
R/W-0
U-0
2: If other conversions are in progress, conversion will be performed when the conversion resources are
available.
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
Unimplemented: Read as ‘0’
IRQEN6: Interrupt Request Enable 6 bit
1 = Enable IRQ generation when requested conversion of channels AN13 and AN12 is completed
0 = IRQ is not generated
PEND6: Pending Conversion Status 6 bit
1 = Conversion of channels AN13 and AN 12 is pending; set when selected trigger is asserted
0 = Conversion is complete
SWTRG6: Software Trigger 6 bit
1 = Start conversion of AN13 (INTREF) and AN12 (EXTREF) (if selected by TRGSRC bits)
This bit is automatically cleared by hardware when the PEND6 bit is set.
0 = Conversion is not started
PEND6
R/W-0
U-0
ADCPC3: A/D CONVERT PAIR CONTROL REGISTER 3
W = Writable bit
‘1’ = Bit is set
SWTRG6
R/W-0
U-0
R/W-0
U-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U-0
TRGSRC6<4:0>
R/W-0
U-0
(1)
x = Bit is unknown
R/W-0
U-0
DS70318D-page 257
(2)
R/W-0
U-0
bit 8
bit 0

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