dspic33fj16gs404t-i-pt Microchip Technology Inc., dspic33fj16gs404t-i-pt Datasheet - Page 248
dspic33fj16gs404t-i-pt
Manufacturer Part Number
dspic33fj16gs404t-i-pt
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC33FJ16GS404T-I-PT.pdf
(346 pages)
- Current page: 248 of 346
- Download datasheet (6Mb)
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 19-1:
DS70318D-page 246
bit 4
bit 3
bit 2-0
Note 1: This control bit can only be changed while ADC is disabled (ADON = 0), and only applies to single SAR
devices.
ASYNCSAMP: Asynchronous Dedicated S&H Sampling Enable bit
1 = The dedicated S&H is constantly sampling and then terminates sampling as soon as the trigger
0 = The dedicated S&H starts sampling when the trigger event is detected and completes the sampling
Unimplemented: Read as ‘0’
ADCS<2:0>: A/D Conversion Clock Divider Select bits
111 = FADC/8
110 = FADC/7
101 = FADC/6
100 = FADC/5
011 = FADC/4 (default)
010 = FADC/3
001 = FADC/2
000 = FADC/1
pulse is detected.
process in two ADC clock cycles.
ADCON: A/D CONTROL REGISTER (CONTINUED)
Preliminary
(1)
(1)
© 2009 Microchip Technology Inc.
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