dspic33fj16gs404t-i-pt Microchip Technology Inc., dspic33fj16gs404t-i-pt Datasheet - Page 206

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dspic33fj16gs404t-i-pt

Manufacturer Part Number
dspic33fj16gs404t-i-pt
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 15-6:
DS70318D-page 204
bit 2
bit 1
bit 0
Note 1: Software must clear the interrupt status here and the corresponding IFS bit in the interrupt controller.
2: The Independent Time Base mode (ITB = 1) must be enabled to use Center-Aligned mode. If ITB = 0, the
3: These bits should be changed only when PTEN = 0. Changing the clock selection during operation will
4: To operate in External Period Reset mode, configure FCLCONx<CLMOD> = 0 and PWMCONx<ITB> = 1.
CAM bit is ignored.
yield unpredictable results.
CAM: Center-Aligned Mode Enable bit
1 = Center-Aligned mode is enabled
0 = Center-Aligned mode is disabled
XPRES: External PWM Reset Control bit
1 = Current-limit source resets time base for this PWM generator if it is in Independent Time Base mode
0 = External pins do not affect PWM time base
IUE: Immediate Update Enable bit
1 = Updates to the active MDC/PDCx/SDCx registers are immediate
0 = Updates to the active MDC/PDCx/SDCx registers are synchronized to the PWM time base
PWMCONx: PWMx CONTROL REGISTER (CONTINUED)
Preliminary
(2,3)
(4)
© 2009 Microchip Technology Inc.

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