atmega32u4-16mu ATMEL Corporation, atmega32u4-16mu Datasheet - Page 101

• Manufacturer Part Number: atmega32u4-16mu
• Description: Atmega32u4 8-bit Avr Microcontroller With 32k Bytes Of Isp Flash And Usb Controller
• Manufacturer: ATMEL Corporation

7766A–AVR–03/08
Note:
• Bits 5:4 – COM0B1:0: Compare Match Output B Mode
These bits control the Output Compare pin (OC0B) behavior. If one or both of the COM0B1:0
bits are set, the OC0B output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0B pin
must be set in order to enable the output driver.
When OC0B is connected to the pin, the function of the COM0B1:0 bits depends on the
WGM02:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 13-4.
Table 13-2
mode.
Table 13-5.
Note:
Table 13-3
rect PWM mode.
Table 13-6.
COM0A1
COM01
COM01
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
page 97
pare Match is ignored, but the set or clear is done at TOP. See
for more details.
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to fast PWM
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
COM0A0
COM00
COM00
0
1
0
1
0
1
0
1
0
1
0
1
for more details.
Table 13-1
Description
Normal port operation, OC0B disconnected.
Toggle OC0B on Compare Match
Clear OC0B on Compare Match
Set OC0B on Compare Match
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match, set OC0B at TOP
Set OC0B on Compare Match, clear OC0B at TOP
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
shows the COM0A1:0 bit functionality when the WGM02:0 bits
(1)
(1)
“Phase Correct PWM Mode” on
“Fast PWM Mode” on page 95
ATmega32U4
101