tmp86fh46bng TOSHIBA Semiconductor CORPORATION, tmp86fh46bng Datasheet - Page 32
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tmp86fh46bng
Manufacturer Part Number
tmp86fh46bng
Description
8 Bit Microcontroller Tlcs-870/c Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP86FH46BNG.pdf
(216 pages)
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Part Number
Manufacturer
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Part Number:
TMP86FH46BNG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
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2.2
System Clock Controller
Table 2-1 Operating Mode and Conditions
Single clock
Dual clock
(a) Single-clock mode
(b) Dual-clock mode
Note 1: NORMAL1 and NORMAL2 modes are generically called NORMAL; SLOW1 and SLOW2 are called SLOW;
Note 2: The mode is released by falling edge of TBTCR<TBTCK> setting.
Operating Mode
RESET
NORMAL1
IDLE1
IDLE0
STOP
NORMAL2
IDLE2
SLOW2
SLEEP2
SLOW1
SLEEP1
SLEEP0
STOP
IDLE0, IDLE1 and IDLE2 are called IDLE; SLEEP0, SLEEP1 and SLEEP2 are called SLEEP.
SLEEP2
SLEEP1
IDLE1
IDLE2
mode
mode
mode
mode
Frequency
Oscillation
Oscillation
High
Stop
Stop
Figure 2-6 Operating Mode Transition Diagram
Oscillator
Frequency
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
Oscillation
SYSCR2<IDLE> = "1"
SYSCR2<TGHALT> = "1"
SYSCR2<IDLE> = "1"
Stop
Stop
Low
SYSCR2<SYSCK> = "0"
SYSCR2<XTEN> = "0"
SYSCR2<XEN> = "1"
Interrupt
Interrupt
Interrupt
Interrupt
Operate with
Operate with
Operate with
CPU Core
High-freq.
Low-freq.
Low-freq.
Operate
Reset
Halt
Halt
Halt
Halt
Note 2
Page 14
High or Low-
Operate with
Operate with
Operate with
Low-freq.
Low-freq.
Operate
NORMAL1
NORMAL2
Reset
WDT
SLEEP0
freq.
SLOW2
SLOW1
Halt
Halt
Halt
Halt
IDLE0
mode
mode
mode
mode
mode
mode
SYSCR2<XTEN> = "1"
SYSCR2<SYSCK> = "1"
SYSCR2<XEN> = "0"
Note 2
SYSCR2<TGHALT> = "1"
Operate
Operate
Reset
SYSCR1<STOP> = "1"
TBT
Halt
Halt
SYSCR1<STOP> = "1"
SYSCR1<STOP> = "1"
STOP pin input
STOP pin input
STOP pin input
Converter
Operate
Operate
Reset
Reset release
Halt
Halt
Halt
AD
Peripherals
Operate
Operate
TMP86FH46BNG
Reset
Other
Halt
Halt
RESET
STOP
Machine Cy-
cle Time
4/fc [s]
4/fc [s]
4/fs [s]
-
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