tmp86fh46bng TOSHIBA Semiconductor CORPORATION, tmp86fh46bng Datasheet - Page 107
tmp86fh46bng
Manufacturer Part Number
tmp86fh46bng
Description
8 Bit Microcontroller Tlcs-870/c Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP86FH46BNG.pdf
(216 pages)
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TMP86FH46BNG
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Example :Generating 1024 Hz pulse using TC4 (fc = 16.0 MHz)
Note 1: In the programmable divider output mode, do not change the TTREGj setting while the timer is running. Since
Note 2: When the timer is stopped during PDO output, the PDOj pin holds the output status when the timer is stopped.
Note 3: j = 3, 4
TTREGj is not in the shift register configuration in the programmable divider output mode, the new value program-
med in TTREGj is in effect immediately after programming. Therefore, if TTREGj is changed while the timer is run-
ning, an expected operation may not be obtained.
To change the output status, program TCjCR<TFFj> after the timer is stopped. Do not change the
TCjCR<TFFj> setting upon stopping of the timer.
Example: Fixing the PDOj pin to the high level when the TimerCounter is stopped
CLR (TCjCR).3 ; Stops the timer.
CLR (TCjCR).7 ; Sets the PDOj pin to the high level.
LD
LD
LD
Setting port
(TTREG4), 3DH
(TC4CR), 00010001B
(TC4CR), 00011001B
Page 89
; 1/1024 ÷ 2
; Sets the operating clock to fc/2
; Starts TC4.
7
/fc ÷ 2 = 3DH
7
, and 8-bit PDO mode.
TMP86FH46BNG
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