tmp86fh46bng TOSHIBA Semiconductor CORPORATION, tmp86fh46bng Datasheet - Page 144
tmp86fh46bng
Manufacturer Part Number
tmp86fh46bng
Description
8 Bit Microcontroller Tlcs-870/c Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP86FH46BNG.pdf
(216 pages)
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TMP86FH46BNG
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11.9
Status Flag
11.9
11.9.1
11.9.2
11.9.3
Status Flag
flag UARTSR<PERR> is set to “1”. The UARTSR<PERR> is cleared to “0” when the RDBUF is read after
reading the UARTSR.
The UARTSR<FERR> is cleared to “0” when the RDBUF is read after reading the UARTSR.
UARTSR<OERR> is set to “1”. In this case, the receive data is discarded; data in RDBUF are not affected.
The UARTSR<OERR> is cleared to “0” when the RDBUF is read after reading the UARTSR.
When parity determined using the receive data bits differs from the received parity bit, the parity error
When “0” is sampled as the stop bit in the receive data, framing error flag UARTSR<FERR> is set to “1”.
When all bits in the next data are received while unread data are still in RDBUF, overrun error flag
RXD pin
UARTSR<FERR>
INTRXD interrupt
Shift register
Parity Error
Shift register
Framing Error
Overrun Error
RXD pin
UARTSR<PERR>
INTRXD interrupt
Figure 11-6 Generation of Framing Error
Figure 11-5 Generation of Parity Error
xxxx0 **
xxx0 **
Final bit
Parity
Page 126
pxxxx0
xxxx0
Stop
*
*
Stop
1pxxxx0
0xxxx0
After reading UARTSR then
RDBUF clears FERR.
After reading UARTSR then
RDBUF clears PERR.
TMP86FH46BNG
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