tc58nvg0s3eta00 TOSHIBA Semiconductor CORPORATION, tc58nvg0s3eta00 Datasheet - Page 41

• Manufacturer Part Number: tc58nvg0s3eta00
• Description: 1 Gbit 128m ? 8 Bit Cmos Nand E2prom
• Manufacturer: TOSHIBA Semiconductor CORPORATION

total 64 times with incrementing the page address in the blocks, and then input the last page data of the
blocks, “10h” command executes final programming. Make sure to terminate with 81h-10h- command
sequence.
command.
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
63th
64th
Starting the above operation from 1st page of the selected erase blocks, and then repeating the operation
In this full sequence, the command sequence is following.
After the “15h” or “10h” command, the results of the above operation is shown through the “71h”Status Read
The 71h command Status description is as below.
1st
RY
/
BY
80
80
80
80
District 0 Chip Status1 : Pass/Fail
District 1 Chip Status1 : Pass/Fail
District 0 Chip Status2 : Pass/Fail
District 1 Chip Status2 : Pass/Fail
Data Cache Ready/Busy
Chip Status1 : Pass/Fail
Write Protect
Ready/Busy
10 or15
STATUS
11
11
11
11
81
81
81
81
Pass: 0
Pass: 0
Pass: 0
Pass: 0
Pass: 0
Ready: 1
Ready: 1
Protect: 0
Status Read
command
15
15
15
10
71
41
OUTPUT
Not Protect: 1
Fail: 1
Fail: 1
Fail: 1
Fail: 1
Fail: 1
Busy: 0
Busy: 0
I/O
Fail
Pass
I/O1 describes Pass/Fail condition of
district 0 and 1(OR data of I/O2 and I/O3).
If one of the districts fails during multi
page program operation, it shows “Fail”.
I/O2 to 5 shows the Pass/Fail condition of
each district. For details on “Chip Status1”
and “Chip Status2”, refer to section
“Status Read”.
TC58NVG0S3ETA00
2010-01-25C