tc58nvg0s3eta00 TOSHIBA Semiconductor CORPORATION, tc58nvg0s3eta00 Datasheet - Page 29

• Manufacturer Part Number: tc58nvg0s3eta00
• Description: 1 Gbit 128m ? 8 Bit Cmos Nand E2prom
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Command Input
Data Input
Address input
Serial Data Output
During Program (Busy)
During Erase (Busy)
During Read (Busy)
Program, Erase Inhibit
Standby
Operation Mode: Logic and Command Tables
in Table 3. Address input, command input and data input/output are controlled by the CLE, ALE, CE , WE ,
Table 2. Logic Table
H: V
* 1: Refer to Application Note (10) toward the end of this document regarding the WP signal when Program or Erase Inhibit
* 2: If CE is low during read busy, WE and RE must be held High to avoid unintended command/address input to the device or
RE and WP signals, as shown in Table 2.
The operation modes such as Program, Erase, Read and Reset are controlled by command operations shown
IH
read to device. Reset or Status Read command can be input during Read Busy.
, L: V
IL
, * : V
IH
or V
IL
CLE
H
L
L
L
*
*
*
*
*
*
ALE
H
L
L
L
*
*
*
*
*
*
29
CE
H
H
L
L
L
L
*
*
L
*
H ( * 2)
WE
H
*
*
*
*
*
H ( * 2)
RE
H
H
H
*
*
*
*
*
TC58NVG0S3ETA00
0 V/V
WP
H
H
H
*
*
*
*
*
L
*1
CC
2010-01-25C