74alvc163245t Fairchild Semiconductor, 74alvc163245t Datasheet

74alvc163245t

Manufacturer Part Number

74alvc163245t

Description

Low Voltage 16-bit Dual Supply Translating Transceiver With 3-state Outputs

Manufacturer

Fairchild Semiconductor

Datasheet

1.74ALVC163245T.pdf (9 pages)

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74ALVC163245GX

(Note 2)

74ALVC163245T

(Note 3)

74ALVC163245

Low Voltage 16-Bit Dual Supply Translating Transceiver

with 3-STATE Outputs

General Description

The ALVC163245 is a dual supply, 16-bit translating trans-

ceiver that is designed for 2 way asynchronous communi-

cation between busses at different supply voltages by

providing true signal translation. The supply rails consist of

3.6V and V

1.65V to 2.7V. (V

for proper device operation). This dual supply design

allows for translation from 1.8V to 2.5V busses to busses at

a higher potential, up to 3.3V.

The Transmit/Receive (T/R) input determines the direction

of data flow. Transmit (active-HIGH) enables data from

A Ports to B Ports; Receive (active-LOW) enables data

from B Ports to A Ports. The Output Enable (OE) input,

when HIGH, disables both A and B Ports by placing them

in a High-Z condition. The A Port interfaces with the higher

voltage bus (2.7V to 3.3V); The B Port interfaces with the

lower voltage bus (1.8V to 2.5V). Also the ALVC163245 is

designed so that the control pins (T/R

by V

The 74ALVC163245 is suitable for mixed voltage applica-

tions such as notebook computers using a 1.8V CPU and

3.3V peripheral components. It is fabricated with an

Advanced CMOS technology to achieve high speed opera-

tion while maintaining low CMOS power dissipation.

Ordering Code:

Note 2: BGA package available in Tape and Reel only.

Note 3: Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Quiet Series

CCA

Order Number

CCB

, which is a higher potential rail operating at 2.3V to

CCB

is a trademark of Fairchild Semiconductor Corporation.

, which is the lower potential rail operating at

CCB

Package Number

must be less than or equal to V

(Preliminary)

BGA54A

MTD48

, OE

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

[Tape and Reel]

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

) are supplied

ds500695

CCA

Features

Note 1: To ensure the high impedance state during power up or power

down, OE

value of the resistor is determined by the current sourcing capability of the

driver.

Bidirectional interface between busses ranging from

1.65V to 3.6V

Supports Live Insertion and Withdrawal (Note 1)

Uses patented Quiet Series

circuitry

Functionally compatible with 74 series 16245

Latchup conforms to JEDEC JED78

ESD performance:

Also packaged in plastic Fine-Pitch Ball Grid Array

(FBGA) (Preliminary)

Human Body Model 2000V

Machine model 200V

Package Description

should be tied to V

CCB

through a pull up resistor. The minimum

November 2001

Revised November 2001

noise/EMI reduction

www.fairchildsemi.com

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74alvc163245t Summary of contents

Page 1

... BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 2) (Preliminary) [Tape and Reel] 74ALVC163245T MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 3) Note 2: BGA package available in Tape and Reel only. Note 3: Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Logic Diagram Connection Diagrams Pin Assignment for TSSOP Pin Assignment for FBGA (Top Thru View) www.fairchildsemi.com Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW) n T/R Transmit/Receive Input n A –A Side A Inputs or 3-STATE Outputs ...

Page 3

Translator Power Up Sequence Recommendations To guard against power up problems, some simple guide- lines need to be adhered to. The 74ALVC163245 is designed so that the control pins (T Therefore the first ...

Page 4

Absolute Maximum Ratings Supply Voltage V CCA V CCB DC Input Voltage ( Output Voltage (V ) (Note 5) I Input Diode Current ( ...

Page 5

AC Electrical Characteristics Symbol Parameter Propagation Delay PHL PLH Propagation Delay PHL PLH Output Enable Time PZL PZH Output ...

Page 6

Capacitance Symbol Parameter C Input Capacitance IN C Output Capacitance OUT C Power Dissipation Capacitance PD www.fairchildsemi.com Conditions Outputs Enabled f 10 MHz ...

Page 7

AC Loading and Waveforms FIGURE 1. AC Test Circuit (Input Characteristics: f Symbol 3.3V 0. FIGURE 2. Waveform for Inverting and ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A (Preliminary) 8 www.fairchildsemi.com ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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