aduc7033bstz-8l-rl Analog Devices, Inc., aduc7033bstz-8l-rl Datasheet - Page 49

• Manufacturer Part Number: aduc7033bstz-8l-rl
• Description: Integrated Precision Battery Sensor For Automotive
• Manufacturer: Analog Devices, Inc.

Bit
2
1
0
ADC Interrupt Mask Register
Name:
Address:
Default Value:
Access:
Function:
ADC Mode Register
Name:
Address:
Default Value:
Access:
Function:
Table 36. ADCMDE MMR Bit Designations
Bit
7
6
5
4 to 3
ADCMSKI
0xFFFF0504
0x00
Read/write
This register allows the ADC interrupt sources to be individually enabled. The bit positions in this register are the
same as the lower eight bits in the ADCSTA MMR. If a bit is set by user code to a 1, the respective interrupt is enabled.
By default, all bits are 0, meaning all ADC interrupt sources are disabled.
ADCMDE
0xFFFF0508
0x00
Read/write
The ADC Mode MMR is an 8-bit register that configures the mode of operation of the ADC subsystem.
Description
Not Used. This bit is reserved for future functionality and should be written as 0 by user code.
20 kΩ Resistor Select.
Low Power Mode Reference Select.
ADC Power Mode Configuration.
Description
Temperature Conversion Result Ready Bit.
Voltage Conversion Result Ready Bit.
Current Conversion Result Ready Bit.
If the temperature channel ADC is enabled, this bit is set by hardware as soon as a valid temperature conversion result
is written in the temperature data register (ADC2DAT MMR). It is also set at the end of a calibration.
Cleared by reading either ADC2DAT or ADC0DAT.
If the voltage channel ADC is enabled, this bit is set by hardware as soon as a valid voltage conversion result is written
in the voltage data register (ADC1DAT MMR). It is also set at the end of a calibration.
Cleared by reading either ADC1DAT or ADC0DAT.
If the current channel ADC is enabled, this bit is set by hardware as soon as a valid current conversion result is written
in the current data register (ADC0DAT MMR). It is also set at the end of a calibration.
Cleared by reading ADC0DAT.
Set to 1 to select the 20 kΩ resistor as shown in Figure 20.
Set to 0 to select the direct path to ground as shown in Figure 20 (default).
Set to 1 to enable the precision voltage reference in either low power mode or low power plus mode. This increases
current consumption.
Set to 0 to enable the low power voltage reference in either low power mode or low power plus mode (default).
00 = ADC normal mode. If enabled, the ADC operates with normal current consumption yielding optimum electrical
performance.
01 = ADC low power mode. If enabled, the I-ADC operates with reduced current consumption. This limitation in
current consumption is achieved (at the expense of ADC noise performance) by fixing the gain to 128 and using the
on-chip low power (131 kHz) oscillator to directly drive the ADC circuits.
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ADuC7033