aduc7033bstz-8l-rl Analog Devices, Inc., aduc7033bstz-8l-rl Datasheet - Page 122

• Manufacturer Part Number: aduc7033bstz-8l-rl
• Description: Integrated Precision Battery Sensor For Automotive
• Manufacturer: Analog Devices, Inc.

ADuC7033
Bit
7
6
5
4
3
2
1
0
Description
Sync Timer Stop Edge Type Bit.
Mode of Operation Bit.
Enable Compare Interrupt Bit.
Enable Stop Interrupt.
Enable Start Interrupt.
LIN Sync Enable Bit.
Edge Counter Clear Bit.
LHS Reset Bit.
Cleared to 0 by user code to disable LHS functionality.
Set to 1 by user code to enable LHS functionality.
Set to 1 by user code to reset all LHS logic to default conditions.
This bit is automatically cleared to 0 after a 15 μs delay.
Cleared to 0 by user code to stop the sync timer on the falling edge count configured through the LHSCON1[7:4]
register.
Set to 1 by user code to stop the sync timer on the rising edge count configured through the LHSCON1[7:4] register.
Cleared to 0 by user code to select LIN mode of operation.
Set to 1 by user code to select BSD mode of operation.
Cleared to 0 by user code to disable compare interrupts.
Set to 1 by user code to generate an LHS interrupt (IRQEN[7]) when the value in LHSVAL0 (LIN synchronization bit
timer) = the value in the LHSCMP register. The LHS Compare Interrupt Bit LHSSTA[3] is set when this interrupt occurs.
This configuration is used in BSD write mode to allow user code to correctly time the output pulse widths of BSD bits
to be transmitted.
Cleared to 0 by user code to disable interrupts when a stop condition occurs.
Set to 1 by user code to generate an interrupt when a stop condition occurs.
Cleared to 0 by user code to disable interrupts when a start condition occurs.
Set to 1 by user code to generate an interrupt when a start condition occurs.
Set to 1 by user code to clear the internal edge counters in the LHS peripheral.
This bit is automatically cleared to 0 after a 15 μs delay.
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