cyv15g0204trb Cypress Semiconductor Corporation., cyv15g0204trb Datasheet - Page 18

• Manufacturer Part Number: cyv15g0204trb
• Description: Independent Clock Hotlink Ii Dual Serializer And Dual Reclocking Deserializer
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-02101 Rev. *B
Table 5. Device Control Latch Configuration Table
JTAG Support
The CYV15G0204TRB contains a JTAG port to allow system
level diagnosis of device interconnect. Of the available JTAG
modes, boundary scan, and bypass are supported. This
capability is present only on the LVTTL inputs and outputs, the
REFCLKx± clock inputs, and the TRGCLKx± clock inputs. The
high-speed serial inputs and outputs are not part of the JTAG
test chain.
Table 6. Receive Character Status Bits
(0000b)
(0001b)
(0010b)
(0100b)
(0101b)
(1000b)
(1001b)
(1010b)
(0011b)
(0110b)
(0111b)
(1011b)
(1100b)
(1101b)
(1110b)
(1111b)
{BISTSTx, RXDx[0], RXDx[1]}
ADDR
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
Channel Type
C
C
C
D
D
D
A
A
A
B
B
B
000, 001
010
011
100
101
110
111
S
S
D
S
S
D
S
S
D
S
S
D
SDASEL2C[1]
SDASEL2D[1]
RXBISTC[1]
RXBISTD[1]
DATA6
X
X
X
X
X
X
1
1
BIST Data Compare. Character compared correctly.
BIST Last Good. Last Character of BIST sequence detected and valid.
Reserved.
BIST Last Bad. Last Character of BIST sequence detected invalid.
BIST Start. Receive BIST is enabled on this channel, but character compares have not yet
commenced. This also indicates a PLL Out of Lock condition.
BIST Error. While comparing characters, a mismatch was found in one or more of the
character bits.
BIST Wait. The receiver is comparing characters. but has not yet found the start of BIST
character to enable the LFSR.
SDASEL2C[0]
SDASEL2D[0]
RXPLLPDC
RXPLLPDD
DATA5
X
X
X
X
X
X
0
0
SDASEL1C[1]
SDASEL1D[1]
RXBISTC[0]
RXBISTD[0]
DATA4
X
X
X
X
X
X
X
X
DO NOT WRITE TO THESE ADDRESSES
INTERNAL TEST REGISTERS
3-Level Select Inputs
Each 3-Level select inputs reports as two bits in the scan
register. These bits report the LOW, MID, and HIGH state of
the associated input as 00, 10, and 11 respectively
JTAG ID
The JTAG device ID for the CYV15G0204TRB is ‘0C811069’x.
(Receive BIST = Enabled)
SDASEL1C[0]
SDASEL1D[0]
TXBISTA
TXBISTB
Receive BIST Status
DATA3
X
X
X
X
X
X
X
X
Description
ROE2C
ROE2D
DATA2
OE2A
OE2B
X
X
X
X
0
0
0
0
TXCKSELA
TXCKSELB
ROE1C
ROE1D
DATA1
OE1A
OE1B
CYV15G0204TRB
X
X
0
0
0
0
TRGRATEC
TRGRATED
TXRATEA
TXRATEB
PABRSTB
RXRATEC
RXRATED
PABRSTA
DATA0
X
X
X
X
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1010110
1011001
1010110
1011001
1010110
1011001
1010110
1011001
1011111
1011111
1011111
1011111
Reset
Value
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