uja1076tw/5v0/wd NXP Semiconductors, uja1076tw/5v0/wd Datasheet - Page 5

• Manufacturer Part Number: uja1076tw/5v0/wd
• Description: High-speed Can Core System Basis Chip
• Manufacturer: NXP Semiconductors

NXP Semiconductors
5. Pinning information
UJA1076_1
Product data sheet
5.1 Pinning
5.2 Pin description
Table 2.
Symbol
i.c.
i.c.
i.c.
V1
i.c.
RSTN
INTN
EN
SDI
SDO
SCK
SCSN
TXDC
RXDC
TEST1
WDOFF
LIMP
Fig 2.
Pin configuration
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Rev. 01 — 1 December 2009
WDOFF
Description
internally connected; should be left floating
internally connected; should be left floating
internally connected; should be left floating
voltage regulator output for the microcontroller (5 V or 3.3 V depending on
SBC version)
internally connected; should be left floating
reset input/output to and from the microcontroller
interrupt output to the microcontroller
enable output
SPI data input
SPI data output
SPI clock input
SPI chip select input
CAN transmit data input
CAN receive data output
test pin; pin should be connected to ground
WDOFF pin for deactivating the watchdog
limp home output
TEST1
RXDC
SCSN
RSTN
TXDC
INTN
SDO
SCK
SDI
EN
i.c.
i.c.
i.c.
i.c.
V1
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
UJA1076
High-speed CAN core system basis chip
015aaa109
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
BAT
VEXCTRL
TEST2
VEXCC
WBIAS
i.c.
i.c.
i.c.
SPLIT
GND
CANL
CANH
V2
WAKE2
WAKE1
LIMP
UJA1076
© NXP B.V. 2009. All rights reserved.
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